/dports/editors/lazarus/examples/imagelist_highdpi_runtime/ |
H A D | unit1.pas | 89 MI, MI2: TMenuItem; 174 MI2.Caption := 'sub1'; 175 MI2.ImageIndex := 0; 176 MI.Add(MI2); 179 MI2.Caption := 'sub2'; 180 MI2.ImageIndex := 1; 181 MI.Add(MI2); 188 MI2.ImageIndex := 0; 189 PM.Items.Add(MI2); 193 MI2.ImageIndex := 1; [all …]
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/dports/editors/lazarus-devel/examples/imagelist_highdpi_runtime/ |
H A D | unit1.pas | 89 MI, MI2: TMenuItem; 174 MI2.Caption := 'sub1'; 175 MI2.ImageIndex := 0; 176 MI.Add(MI2); 179 MI2.Caption := 'sub2'; 180 MI2.ImageIndex := 1; 181 MI.Add(MI2); 188 MI2.ImageIndex := 0; 189 PM.Items.Add(MI2); 193 MI2.ImageIndex := 1; [all …]
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/dports/editors/lazarus-qt5/examples/imagelist_highdpi_runtime/ |
H A D | unit1.pas | 89 MI, MI2: TMenuItem; 174 MI2.Caption := 'sub1'; 175 MI2.ImageIndex := 0; 176 MI.Add(MI2); 179 MI2.Caption := 'sub2'; 180 MI2.ImageIndex := 1; 181 MI.Add(MI2); 188 MI2.ImageIndex := 0; 189 PM.Items.Add(MI2); 193 MI2.ImageIndex := 1; [all …]
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/dports/editors/lazarus-qt5-devel/examples/imagelist_highdpi_runtime/ |
H A D | unit1.pas | 89 MI, MI2: TMenuItem; 174 MI2.Caption := 'sub1'; 175 MI2.ImageIndex := 0; 176 MI.Add(MI2); 179 MI2.Caption := 'sub2'; 180 MI2.ImageIndex := 1; 181 MI.Add(MI2); 188 MI2.ImageIndex := 0; 189 PM.Items.Add(MI2); 193 MI2.ImageIndex := 1; [all …]
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/dports/lang/fpc-source/fpc-3.2.2/tests/webtbs/ |
H A D | tw14553.pp | 15 MI1,MI2,MI3:Variant; 22 MI2:=CreateOleObject('MapInfo.Application'); 26 MI2.&do('Set Application Window '+H2); 30 MI2.&do('Set Next Document Parent '+H2+' Style 1'); 41 MI2:=UnAssigned;
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/dports/devel/llvm80/llvm-8.0.1.src/unittests/CodeGen/ |
H A D | MachineInstrTest.cpp | 124 auto MI2 = MF->CreateMachineInstr(MCID, DebugLoc()); in TEST() local 125 MI2->addOperand(*MF, MachineOperand::CreateReg(VirtualDef2, /*isDef*/ true)); in TEST() 126 MI2->addOperand(*MF, MachineOperand::CreateReg(VirtualUse, /*isDef*/ false)); in TEST() 130 ASSERT_FALSE(MI1->isIdenticalTo(*MI2, MachineInstr::CheckDefs)); in TEST() 131 ASSERT_FALSE(MI2->isIdenticalTo(*MI1, MachineInstr::CheckDefs)); in TEST() 133 ASSERT_TRUE(MI1->isIdenticalTo(*MI2, MachineInstr::IgnoreVRegDefs)); in TEST() 134 ASSERT_TRUE(MI2->isIdenticalTo(*MI1, MachineInstr::IgnoreVRegDefs)); in TEST() 158 void checkHashAndIsEqualMatch(MachineInstr *MI1, MachineInstr *MI2) { in checkHashAndIsEqualMatch() argument 159 bool IsEqual1 = MachineInstrExpressionTrait::isEqual(MI1, MI2); in checkHashAndIsEqualMatch() 160 bool IsEqual2 = MachineInstrExpressionTrait::isEqual(MI2, MI1); in checkHashAndIsEqualMatch() [all …]
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/dports/devel/llvm70/llvm-7.0.1.src/unittests/CodeGen/ |
H A D | MachineInstrTest.cpp | 124 auto MI2 = MF->CreateMachineInstr(MCID, DebugLoc()); 125 MI2->addOperand(*MF, MachineOperand::CreateReg(VirtualDef2, /*isDef*/ true)); 126 MI2->addOperand(*MF, MachineOperand::CreateReg(VirtualUse, /*isDef*/ false)); 130 ASSERT_FALSE(MI1->isIdenticalTo(*MI2, MachineInstr::CheckDefs)); 131 ASSERT_FALSE(MI2->isIdenticalTo(*MI1, MachineInstr::CheckDefs)); 133 ASSERT_TRUE(MI1->isIdenticalTo(*MI2, MachineInstr::IgnoreVRegDefs)); 134 ASSERT_TRUE(MI2->isIdenticalTo(*MI1, MachineInstr::IgnoreVRegDefs)); 158 void checkHashAndIsEqualMatch(MachineInstr *MI1, MachineInstr *MI2) { 159 bool IsEqual1 = MachineInstrExpressionTrait::isEqual(MI1, MI2); 160 bool IsEqual2 = MachineInstrExpressionTrait::isEqual(MI2, MI1); [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 403 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 407 unsigned Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 465 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 622 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 633 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 738 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 741 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 745 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 747 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 751 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Mips/ |
H A D | MicroMipsSizeReduction.cpp | 404 if (!GetImm(MI2, 2, Offset2)) in ConsecutiveInstr() 408 unsigned Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() 466 MachineInstr *MI2 = &*NextMII; in ReduceXWtoXWP() local 623 MachineInstr *MI2 = &*NextMII; in ReduceMoveToMovep() local 634 if (MI2->getOpcode() != Entry.WideOpc()) in ReduceMoveToMovep() 739 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 742 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 746 MIB.add(MI2->getOperand(0)); in ReplaceInstruction() 748 MIB.add(MI2->getOperand(1)); in ReplaceInstruction() 752 MIB.add(MI2->getOperand(2)); in ReplaceInstruction() [all …]
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/dports/devel/luabind/luabind-0.9.1/test/ |
H A D | test_policies.cpp | 91 struct MI2; 95 void add(MI2 *) {} in add() 98 struct MI2 : public MI1 struct 100 virtual ~MI2() in ~MI2() argument 104 struct MI2W : public MI2, public luabind::wrap_base {}; 137 class_<MI2,MI2W,MI1>("mi2") in test_main()
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/dports/games/valyriatear/ValyriaTear-1.1.0/src/luabind/test/ |
H A D | test_policies.cpp | 91 struct MI2; 95 void add(MI2 *) {} in add() 98 struct MI2 : public MI1 struct 100 virtual ~MI2() in ~MI2() argument 104 struct MI2W : public MI2, public luabind::wrap_base {}; 139 class_<MI2,MI2W,MI1>("mi2") in test_main()
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