/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/firmware/usrp2/usrp2/ |
H A D | eth_phy.h | 65 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/firmware/usrp2/usrp2p/ |
H A D | eth_phy.h | 62 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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/dports/emulators/qemu42/qemu-4.2.1/hw/net/fsl_etsec/ |
H A D | etsec.h | 79 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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H A D | etsec.c | 341 MII_SR_EXTENDED_CAPS | MII_SR_LINK_STATUS | MII_SR_AUTONEG_CAPS | in etsec_reset()
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/dports/emulators/qemu/qemu-6.2.0/hw/net/fsl_etsec/ |
H A D | etsec.h | 80 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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H A D | etsec.c | 343 MII_SR_EXTENDED_CAPS | MII_SR_LINK_STATUS | MII_SR_AUTONEG_CAPS | in etsec_reset()
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/dports/emulators/qemu60/qemu-6.0.0/hw/net/fsl_etsec/ |
H A D | etsec.h | 80 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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H A D | etsec.c | 343 MII_SR_EXTENDED_CAPS | MII_SR_LINK_STATUS | MII_SR_AUTONEG_CAPS | in etsec_reset()
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/dports/emulators/qemu-utils/qemu-4.2.1/hw/net/fsl_etsec/ |
H A D | etsec.h | 79 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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H A D | etsec.c | 341 MII_SR_EXTENDED_CAPS | MII_SR_LINK_STATUS | MII_SR_AUTONEG_CAPS | in etsec_reset()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/net/fsl_etsec/ |
H A D | etsec.h | 80 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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H A D | etsec.c | 337 MII_SR_EXTENDED_CAPS | MII_SR_LINK_STATUS | MII_SR_AUTONEG_CAPS | in etsec_reset()
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/dports/emulators/qemu5/qemu-5.2.0/hw/net/fsl_etsec/ |
H A D | etsec.h | 80 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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H A D | etsec.c | 342 MII_SR_EXTENDED_CAPS | MII_SR_LINK_STATUS | MII_SR_AUTONEG_CAPS | in etsec_reset()
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/net/fsl_etsec/ |
H A D | etsec.h | 80 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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H A D | etsec.c | 343 MII_SR_EXTENDED_CAPS | MII_SR_LINK_STATUS | MII_SR_AUTONEG_CAPS | in etsec_reset()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/net/fsl_etsec/ |
H A D | etsec.h | 79 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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H A D | etsec.c | 341 MII_SR_EXTENDED_CAPS | MII_SR_LINK_STATUS | MII_SR_AUTONEG_CAPS |
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/net/fsl_etsec/ |
H A D | etsec.h | 79 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/atheros/atlx/ |
H A D | atlx.h | 319 #define MII_SR_EXTENDED_CAPS 0x0001 /* Ext register capabilities */ macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/atheros/atlx/ |
H A D | atlx.h | 319 #define MII_SR_EXTENDED_CAPS 0x0001 /* Ext register capabilities */ macro
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/atheros/atlx/ |
H A D | atlx.h | 319 #define MII_SR_EXTENDED_CAPS 0x0001 /* Ext register capabilities */ macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/oki-semi/pch_gbe/ |
H A D | pch_gbe_phy.c | 49 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/oki-semi/pch_gbe/ |
H A D | pch_gbe_phy.c | 49 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/oki-semi/pch_gbe/ |
H A D | pch_gbe_phy.c | 49 #define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */ macro
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