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Searched refs:MIN_USABLE_STACK_SIZE (Results 1 – 25 of 62) sorted by relevance

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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-tegra/tegra186/
H A Dnvtboot_mem.c25 #define MIN_USABLE_STACK_SIZE SZ_1M macro
152 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in dram_init_banksize()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-tegra/tegra186/
H A Dnvtboot_mem.c25 #define MIN_USABLE_STACK_SIZE SZ_1M macro
152 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in dram_init_banksize()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-tegra/tegra186/
H A Dnvtboot_mem.c25 #define MIN_USABLE_STACK_SIZE SZ_1M macro
152 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in dram_init_banksize()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-tegra/tegra186/
H A Dnvtboot_mem.c25 #define MIN_USABLE_STACK_SIZE SZ_1M
152 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) {
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/mach-tegra/tegra186/
H A Dnvtboot_mem.c25 #define MIN_USABLE_STACK_SIZE SZ_1M macro
152 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in dram_init_banksize()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dcboot.c38 #define MIN_USABLE_STACK_SIZE SZ_1M macro
182 if ((gd->start_addr_sp - region_base) < MIN_USABLE_STACK_SIZE) { in cboot_dram_init_banksize()

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