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Searched refs:MIPS16OP_SH_REG32R (Results 1 – 25 of 30) sorted by relevance

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/dports/emulators/vmips/vmips-1.5.1/libopcodes_mips/opcode/
H A Dmips.h717 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/include/opcode/
H A Dmips.h806 #define MIPS16OP_SH_REG32R 3
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/include/opcode/
H A Dmips.h817 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/include/opcode/
H A Dmips.h806 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/include/opcode/
H A Dmips.h951 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/djgpp-binutils/binutils-2.17/include/opcode/
H A Dmips.h877 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/avr-gdb/gdb-7.3.1/include/opcode/
H A Dmips.h1033 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/gdb761/gdb-7.6.1/include/opcode/
H A Dmips.h1313 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/include/opcode/
H A Dmips.h1648 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/binutils/binutils-2.37/include/opcode/
H A Dmips.h1855 #define MIPS16OP_SH_REG32R 3 macro
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/include/opcode/
H A Dmips.h1775 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/
H A Dmips.h1855 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/gnulibiberty/binutils-2.37/include/opcode/
H A Dmips.h1855 #define MIPS16OP_SH_REG32R 3 macro
/dports/lang/gnatdroid-binutils/binutils-2.27/include/opcode/
H A Dmips.h1775 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/gdb/gdb-11.1/include/opcode/
H A Dmips.h1855 #define MIPS16OP_SH_REG32R 3 macro
/dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/
H A Dmips.h1812 #define MIPS16OP_SH_REG32R 3 macro
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/gas/config/
H A Dtc-mips.c3276 insn.insn_opcode |= regno << MIPS16OP_SH_REG32R;
9536 ip->insn_opcode |= regno << MIPS16OP_SH_REG32R;
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/gas/config/
H A Dtc-mips.c3276 insn.insn_opcode |= regno << MIPS16OP_SH_REG32R; in mips16_macro_build()
9536 ip->insn_opcode |= regno << MIPS16OP_SH_REG32R; in mips16_ip()
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dmips-dis.c945 #define MIPS16OP_SH_REG32R 3 macro
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dmips.c993 #define MIPS16OP_SH_REG32R 3 macro
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dmips.c993 #define MIPS16OP_SH_REG32R 3 macro
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dmips.c993 #define MIPS16OP_SH_REG32R 3 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Dmips.c993 #define MIPS16OP_SH_REG32R 3 macro
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dmips.c993 #define MIPS16OP_SH_REG32R 3 macro
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Dmips.c993 #define MIPS16OP_SH_REG32R 3 macro

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