/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.ds.fmax.ll | 29 ; GFX8-MIR: bb.1 (%ir-block.0): 35 ; GFX8-MIR: $m0 = S_MOV_B32 -1 40 ; GFX9-MIR: bb.1 (%ir-block.0): 71 ; GFX8-MIR: bb.1 (%ir-block.0): 82 ; GFX9-MIR: bb.1 (%ir-block.0): 112 ; GFX8-MIR: bb.1 (%ir-block.0): 120 ; GFX8-MIR: S_ENDPGM 0 122 ; GFX9-MIR: bb.1 (%ir-block.0): 129 ; GFX9-MIR: S_ENDPGM 0 158 ; GFX8-MIR: S_ENDPGM 0 [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.ds.fmax.ll | 29 ; GFX8-MIR: bb.1 (%ir-block.0): 35 ; GFX8-MIR: $m0 = S_MOV_B32 -1 40 ; GFX9-MIR: bb.1 (%ir-block.0): 71 ; GFX8-MIR: bb.1 (%ir-block.0): 82 ; GFX9-MIR: bb.1 (%ir-block.0): 112 ; GFX8-MIR: bb.1 (%ir-block.0): 120 ; GFX8-MIR: S_ENDPGM 0 122 ; GFX9-MIR: bb.1 (%ir-block.0): 129 ; GFX9-MIR: S_ENDPGM 0 158 ; GFX8-MIR: S_ENDPGM 0 [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.ds.fmax.ll | 29 ; GFX8-MIR: bb.1 (%ir-block.0): 35 ; GFX8-MIR: $m0 = S_MOV_B32 -1 40 ; GFX9-MIR: bb.1 (%ir-block.0): 71 ; GFX8-MIR: bb.1 (%ir-block.0): 82 ; GFX9-MIR: bb.1 (%ir-block.0): 112 ; GFX8-MIR: bb.1 (%ir-block.0): 120 ; GFX8-MIR: S_ENDPGM 0 122 ; GFX9-MIR: bb.1 (%ir-block.0): 129 ; GFX9-MIR: S_ENDPGM 0 158 ; GFX8-MIR: S_ENDPGM 0 [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.ds.fmax.ll | 29 ; GFX8-MIR: bb.1 (%ir-block.0): 35 ; GFX8-MIR: $m0 = S_MOV_B32 -1 40 ; GFX9-MIR: bb.1 (%ir-block.0): 71 ; GFX8-MIR: bb.1 (%ir-block.0): 82 ; GFX9-MIR: bb.1 (%ir-block.0): 112 ; GFX8-MIR: bb.1 (%ir-block.0): 120 ; GFX8-MIR: S_ENDPGM 0 122 ; GFX9-MIR: bb.1 (%ir-block.0): 129 ; GFX9-MIR: S_ENDPGM 0 158 ; GFX8-MIR: S_ENDPGM 0 [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.ds.fmax.ll | 29 ; GFX8-MIR: bb.1 (%ir-block.0): 35 ; GFX8-MIR: $m0 = S_MOV_B32 -1 40 ; GFX9-MIR: bb.1 (%ir-block.0): 71 ; GFX8-MIR: bb.1 (%ir-block.0): 82 ; GFX9-MIR: bb.1 (%ir-block.0): 112 ; GFX8-MIR: bb.1 (%ir-block.0): 120 ; GFX8-MIR: S_ENDPGM 0 122 ; GFX9-MIR: bb.1 (%ir-block.0): 129 ; GFX9-MIR: S_ENDPGM 0 158 ; GFX8-MIR: S_ENDPGM 0 [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.ds.fmax.ll | 29 ; GFX8-MIR: bb.1 (%ir-block.0): 35 ; GFX8-MIR: $m0 = S_MOV_B32 -1 40 ; GFX9-MIR: bb.1 (%ir-block.0): 71 ; GFX8-MIR: bb.1 (%ir-block.0): 82 ; GFX9-MIR: bb.1 (%ir-block.0): 112 ; GFX8-MIR: bb.1 (%ir-block.0): 120 ; GFX8-MIR: S_ENDPGM 0 122 ; GFX9-MIR: bb.1 (%ir-block.0): 129 ; GFX9-MIR: S_ENDPGM 0 158 ; GFX8-MIR: S_ENDPGM 0 [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.ds.fmax.ll | 29 ; GFX8-MIR: bb.1 (%ir-block.0): 35 ; GFX8-MIR: $m0 = S_MOV_B32 -1 40 ; GFX9-MIR: bb.1 (%ir-block.0): 71 ; GFX8-MIR: bb.1 (%ir-block.0): 82 ; GFX9-MIR: bb.1 (%ir-block.0): 112 ; GFX8-MIR: bb.1 (%ir-block.0): 120 ; GFX8-MIR: S_ENDPGM 0 122 ; GFX9-MIR: bb.1 (%ir-block.0): 129 ; GFX9-MIR: S_ENDPGM 0 158 ; GFX8-MIR: S_ENDPGM 0 [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
H A D | llvm.amdgcn.ds.fmax.ll | 29 ; GFX8-MIR: bb.1 (%ir-block.0): 35 ; GFX8-MIR: $m0 = S_MOV_B32 -1 40 ; GFX9-MIR: bb.1 (%ir-block.0): 71 ; GFX8-MIR: bb.1 (%ir-block.0): 82 ; GFX9-MIR: bb.1 (%ir-block.0): 112 ; GFX8-MIR: bb.1 (%ir-block.0): 120 ; GFX8-MIR: S_ENDPGM 0 122 ; GFX9-MIR: bb.1 (%ir-block.0): 129 ; GFX9-MIR: S_ENDPGM 0 158 ; GFX8-MIR: S_ENDPGM 0 [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/ |
H A D | arm64-this-return.ll | 21 ; GISEL-MIR-LABEL: name: C_ctor_base 22 ; GISEL-MIR: bb.1.entry: 23 ; GISEL-MIR: liveins: $w1, $x0 49 ; GISEL-MIR: bb.1.entry: 50 ; GISEL-MIR: liveins: $w1, $x0 81 ; GISEL-MIR: bb.1.entry: 82 ; GISEL-MIR: liveins: $w1, $x0 97 ; GISEL-MIR: bb.1.entry: 98 ; GISEL-MIR: liveins: $w1, $x0 118 ; GISEL-MIR: bb.1.entry: [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/ |
H A D | arm64-this-return.ll | 21 ; GISEL-MIR-LABEL: name: C_ctor_base 22 ; GISEL-MIR: bb.1.entry: 23 ; GISEL-MIR: liveins: $w1, $x0 49 ; GISEL-MIR: bb.1.entry: 50 ; GISEL-MIR: liveins: $w1, $x0 81 ; GISEL-MIR: bb.1.entry: 82 ; GISEL-MIR: liveins: $w1, $x0 97 ; GISEL-MIR: bb.1.entry: 98 ; GISEL-MIR: liveins: $w1, $x0 118 ; GISEL-MIR: bb.1.entry: [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/ |
H A D | arm64-this-return.ll | 21 ; GISEL-MIR-LABEL: name: C_ctor_base 22 ; GISEL-MIR: bb.1.entry: 23 ; GISEL-MIR: liveins: $w1, $x0 49 ; GISEL-MIR: bb.1.entry: 50 ; GISEL-MIR: liveins: $w1, $x0 81 ; GISEL-MIR: bb.1.entry: 82 ; GISEL-MIR: liveins: $w1, $x0 97 ; GISEL-MIR: bb.1.entry: 98 ; GISEL-MIR: liveins: $w1, $x0 118 ; GISEL-MIR: bb.1.entry: [all …]
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/ |
H A D | arm64-this-return.ll | 21 ; GISEL-MIR-LABEL: name: C_ctor_base 22 ; GISEL-MIR: bb.1.entry: 23 ; GISEL-MIR: liveins: $w1, $x0 49 ; GISEL-MIR: bb.1.entry: 50 ; GISEL-MIR: liveins: $w1, $x0 81 ; GISEL-MIR: bb.1.entry: 82 ; GISEL-MIR: liveins: $w1, $x0 97 ; GISEL-MIR: bb.1.entry: 98 ; GISEL-MIR: liveins: $w1, $x0 118 ; GISEL-MIR: bb.1.entry: [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/ |
H A D | arm64-this-return.ll | 21 ; GISEL-MIR-LABEL: name: C_ctor_base 22 ; GISEL-MIR: bb.1.entry: 23 ; GISEL-MIR: liveins: $w1, $x0 49 ; GISEL-MIR: bb.1.entry: 50 ; GISEL-MIR: liveins: $w1, $x0 81 ; GISEL-MIR: bb.1.entry: 82 ; GISEL-MIR: liveins: $w1, $x0 97 ; GISEL-MIR: bb.1.entry: 98 ; GISEL-MIR: liveins: $w1, $x0 118 ; GISEL-MIR: bb.1.entry: [all …]
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/NVPTX/ |
H A D | proxy-reg-erasure-mir.ll | 2 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-BEFORE 5 ; RUN: | FileCheck %s --check-prefix=MIR --check-prefix=MIR-AFTER 7 ; Check ProxyRegErasure pass MIR manipulation. 11 ; MIR: body: 12 ; MIR-DAG: Callseq_Start {{[0-9]+}}, {{[0-9]+}} 14 ; MIR-DAG: Callseq_End {{[0-9]+}} 16 ; MIR-BEFORE-DAG: %4:int32regs = ProxyRegI32 killed %0 17 ; MIR-BEFORE-DAG: %5:int32regs = ProxyRegI32 killed %1 18 ; MIR-BEFORE-DAG: %6:int32regs = ProxyRegI32 killed %2 19 ; MIR-BEFORE-DAG: %7:int32regs = ProxyRegI32 killed %3 [all …]
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