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Searched refs:MMC_CLKRT (Results 1 – 25 of 94) sorted by relevance

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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/mmc/host/
H A Dpxamci.h20 #define MMC_CLKRT 0x0008 /* 3 bit */ macro
H A Dpxamci.c260 writel(host->clkrt, host->base + MMC_CLKRT); in pxamci_start_cmd()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/mmc/host/
H A Dpxamci.h20 #define MMC_CLKRT 0x0008 /* 3 bit */ macro
H A Dpxamci.c260 writel(host->clkrt, host->base + MMC_CLKRT); in pxamci_start_cmd()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/mmc/host/
H A Dpxamci.h20 #define MMC_CLKRT 0x0008 /* 3 bit */ macro
H A Dpxamci.c260 writel(host->clkrt, host->base + MMC_CLKRT); in pxamci_start_cmd()
/dports/emulators/qemu/qemu-6.2.0/hw/sd/
H A Dpxa2xx_mmci.c118 #define MMC_CLKRT 0x08 /* MMC Clock Rate register */ macro
291 case MMC_CLKRT: in pxa2xx_mmci_read()
383 case MMC_CLKRT: in pxa2xx_mmci_write()
/dports/emulators/qemu60/qemu-6.0.0/hw/sd/
H A Dpxa2xx_mmci.c118 #define MMC_CLKRT 0x08 /* MMC Clock Rate register */ macro
291 case MMC_CLKRT: in pxa2xx_mmci_read()
383 case MMC_CLKRT: in pxa2xx_mmci_write()
/dports/emulators/qemu5/qemu-5.2.0/hw/sd/
H A Dpxa2xx_mmci.c118 #define MMC_CLKRT 0x08 /* MMC Clock Rate register */ macro
291 case MMC_CLKRT: in pxa2xx_mmci_read()
383 case MMC_CLKRT: in pxa2xx_mmci_write()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/sd/
H A Dpxa2xx_mmci.c118 #define MMC_CLKRT 0x08 /* MMC Clock Rate register */ macro
291 case MMC_CLKRT: in pxa2xx_mmci_read()
383 case MMC_CLKRT: in pxa2xx_mmci_write()
/dports/emulators/qemu42/qemu-4.2.1/hw/sd/
H A Dpxa2xx_mmci.c119 #define MMC_CLKRT 0x08 /* MMC Clock Rate register */ macro
292 case MMC_CLKRT: in pxa2xx_mmci_read()
384 case MMC_CLKRT: in pxa2xx_mmci_write()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/sd/
H A Dpxa2xx_mmci.c118 #define MMC_CLKRT 0x08 /* MMC Clock Rate register */ macro
291 case MMC_CLKRT: in pxa2xx_mmci_read()
383 case MMC_CLKRT: in pxa2xx_mmci_write()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/sd/
H A Dpxa2xx_mmci.c119 #define MMC_CLKRT 0x08 /* MMC Clock Rate register */ macro
292 case MMC_CLKRT: in pxa2xx_mmci_read()
384 case MMC_CLKRT: in pxa2xx_mmci_write()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/sd/
H A Dpxa2xx_mmci.c119 #define MMC_CLKRT 0x08 /* MMC Clock Rate register */
292 case MMC_CLKRT:
384 case MMC_CLKRT:
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/sd/
H A Dpxa2xx_mmci.c119 #define MMC_CLKRT 0x08 /* MMC Clock Rate register */ macro
292 case MMC_CLKRT: in pxa2xx_mmci_read()
384 case MMC_CLKRT: in pxa2xx_mmci_write()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/drivers/mmc/
H A Dpxa_mmc.c563 MMC_CLKRT = MMC_CLKRT_0_3125MHZ; in mmc_legacy_init()
632 MMC_CLKRT = 0; /* 20 MHz */ in mmc_legacy_init()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/drivers/mmc/
H A Dpxa_mmc.c563 MMC_CLKRT = MMC_CLKRT_0_3125MHZ; in mmc_legacy_init()
632 MMC_CLKRT = 0; /* 20 MHz */ in mmc_legacy_init()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/drivers/mmc/
H A Dpxa_mmc.c563 MMC_CLKRT = MMC_CLKRT_0_3125MHZ; in mmc_legacy_init()
632 MMC_CLKRT = 0; /* 20 MHz */ in mmc_legacy_init()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/drivers/mmc/
H A Dpxa_mmc.c563 MMC_CLKRT = MMC_CLKRT_0_3125MHZ; in mmc_legacy_init()
632 MMC_CLKRT = 0; /* 20 MHz */ in mmc_legacy_init()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/drivers/mmc/
H A Dpxa_mmc.c563 MMC_CLKRT = MMC_CLKRT_0_3125MHZ; in mmc_legacy_init()
632 MMC_CLKRT = 0; /* 20 MHz */ in mmc_legacy_init()
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/drivers/mmc/
H A Dpxa_mmc.c563 MMC_CLKRT = MMC_CLKRT_0_3125MHZ; in mmc_legacy_init()
632 MMC_CLKRT = 0; /* 20 MHz */ in mmc_legacy_init()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/drivers/mmc/
H A Dpxa_mmc.c563 MMC_CLKRT = MMC_CLKRT_0_3125MHZ; in mmc_legacy_init()
632 MMC_CLKRT = 0; /* 20 MHz */ in mmc_legacy_init()
/dports/devel/openwince-include/include-0.4.2/arm/pxa2x0/
H A Dmmc.h92 #define MMC_CLKRT MMC_pointer->mmc_clkrt macro
/dports/devel/codeblocks/codeblocks-20.03/src/plugins/scriptedwizard/resources/arm/files/phyCORE-PXA255/h/
H A Dpxa255regs.h924 #define MMC_CLKRT __REG(MMC_BASE+0x0008) macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h2070 #define MMC_CLKRT 0x41100008 /* MMC clock rate */ macro

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