| /dports/net/google-cloud-sdk-app-engine-go/platform/google_appengine/goroot-1.9/src/runtime/ |
| H A D | sys_darwin_arm64.s | 376 MOVN $30, R16
382 MOVN $27, R16 // task_self_trap
388 MOVN $26, R16 // thread_self_trap
394 MOVN $25, R16 // mach_reply_port
405 MOVN $35, R16 // semaphore_wait_trap
415 MOVN $37, R16 // semaphore_timedwait_trap
423 MOVN $32, R16 // semaphore_signal_trap
431 MOVN $33, R16 // semaphore_signal_all_trap
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/breakpad/breakpad/src/common/android/include/asm-mips/ |
| H A D | asm.h | 66 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: macro
71 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; … macro
76 #define MOVN(rd, rs, rt) movn rd, rs, rt macro
|
| /dports/lang/spidermonkey78/firefox-78.9.0/toolkit/crashreporter/google-breakpad/src/common/android/include/asm-mips/ |
| H A D | asm.h | 66 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: macro
71 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; … macro
76 #define MOVN(rd, rs, rt) movn rd, rs, rt macro
|
| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/third_party/breakpad/breakpad/src/common/android/include/asm-mips/ |
| H A D | asm.h | 66 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: macro
71 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; … macro
76 #define MOVN(rd, rs, rt) movn rd, rs, rt macro
|
| /dports/www/firefox/firefox-99.0/toolkit/crashreporter/google-breakpad/src/common/android/include/asm-mips/ |
| H A D | asm.h | 66 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: macro
71 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; … macro
76 #define MOVN(rd, rs, rt) movn rd, rs, rt macro
|
| /dports/mail/thunderbird/thunderbird-91.8.0/toolkit/crashreporter/google-breakpad/src/common/android/include/asm-mips/ |
| H A D | asm.h | 66 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: macro
71 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; … macro
76 #define MOVN(rd, rs, rt) movn rd, rs, rt macro
|
| /dports/www/firefox-esr/firefox-91.8.0/toolkit/crashreporter/google-breakpad/src/common/android/include/asm-mips/ |
| H A D | asm.h | 66 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: macro
71 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; … macro
76 #define MOVN(rd, rs, rt) movn rd, rs, rt macro
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/llvm90/llvm-9.0.1.src/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/llvm80/llvm-8.0.1.src/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/llvm70/llvm-7.0.1.src/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 179 ; Two 32-bit immediates are encodable by both MOVN and MOVZ, make sure the MOV
196 ; overlaps with MOVZ or MOVN if the repeat-width is the whole register. In
197 ; both cases MOVZ/MOVN are preferred.
222 ; 0xffff is interesting because there are exceptions in the MOVN rules for
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/mips/include/asm/ |
| H A D | asm.h | 169 #define MOVN(rd, rs, rt) \ macro
185 #define MOVN(rd, rs, rt) \ macro
202 #define MOVN(rd, rs, rt) \ macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/mips/include/asm/ |
| H A D | asm.h | 169 #define MOVN(rd, rs, rt) \ macro
185 #define MOVN(rd, rs, rt) \ macro
202 #define MOVN(rd, rs, rt) \ macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/mips/include/asm/ |
| H A D | asm.h | 169 #define MOVN(rd, rs, rt) \ macro
185 #define MOVN(rd, rs, rt) \ macro
202 #define MOVN(rd, rs, rt) \ macro
|