| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/altera/ |
| H A D | altera_msgdma.c | 39 MSGDMA_CSR_STAT_RESETTING)) in msgdma_reset()
61 MSGDMA_CSR_STAT_RESETTING)) in msgdma_reset()
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| H A D | altera_msgdmahw.h | 98 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/altera/ |
| H A D | altera_msgdma.c | 39 MSGDMA_CSR_STAT_RESETTING)) in msgdma_reset()
61 MSGDMA_CSR_STAT_RESETTING)) in msgdma_reset()
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| H A D | altera_msgdmahw.h | 98 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/altera/ |
| H A D | altera_msgdma.c | 39 MSGDMA_CSR_STAT_RESETTING)) in msgdma_reset()
61 MSGDMA_CSR_STAT_RESETTING)) in msgdma_reset()
|
| H A D | altera_msgdmahw.h | 98 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/net/ |
| H A D | altera_tse.h | 137 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/net/ |
| H A D | altera_tse.h | 137 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/net/ |
| H A D | altera_tse.h | 137 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/net/ |
| H A D | altera_tse.h | 138 #define MSGDMA_CSR_STAT_RESETTING BIT(6) macro
|