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Searched refs:MT32 (Results 1 – 25 of 141) sorted by relevance

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/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dmips-opc.c150 #define MT32 (INSN_MT) macro
565 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
566 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
631 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
632 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
635 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
636 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
638 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
639 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
781 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/mips/gnu/
H A Dmips-opc.c165 #define MT32 INSN_MT macro
609 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
610 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
681 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
682 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
685 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
686 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
688 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
689 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
842 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/
H A Dmips-opc.c165 #define MT32 INSN_MT macro
686 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
687 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
760 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
761 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
764 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
765 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
767 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
768 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
928 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/devel/gdb761/gdb-7.6.1/opcodes/
H A Dmips-opc.c183 #define MT32 INSN_MT macro
721 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
722 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
795 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
796 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
800 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
801 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
803 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
804 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
1000 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dmips-dis.c1183 #define MT32 INSN_MT macro
1601 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
1602 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
1665 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
1666 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
1669 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
1670 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
1672 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
1673 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
1820 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dmips.c1236 #define MT32 INSN_MT macro
2356 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
2357 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2420 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
2421 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2424 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
2425 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2428 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
2429 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2579 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dmips.c1236 #define MT32 INSN_MT macro
2346 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
2347 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2410 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
2411 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2414 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
2415 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2418 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
2419 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2569 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dmips.c1236 #define MT32 INSN_MT macro
2356 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
2357 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2420 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
2421 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2424 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
2425 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2428 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
2429 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2579 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Dmips.c1236 #define MT32 INSN_MT macro
2346 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
2347 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2410 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
2411 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2414 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
2415 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2418 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
2419 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2569 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dmips.c1236 #define MT32 INSN_MT macro
2356 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
2357 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2420 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
2421 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2424 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
2425 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2428 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
2429 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2579 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Dmips.c1236 #define MT32 INSN_MT macro
2346 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
2347 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2410 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
2411 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2414 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
2415 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2418 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
2419 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2569 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/
H A Dmips.c1236 #define MT32 INSN_MT
2356 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
2357 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2420 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
2421 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2424 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
2425 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2428 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
2429 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2579 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/
H A Dmips.c1236 #define MT32 INSN_MT macro
2356 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
2357 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2420 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
2421 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2424 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
2425 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2428 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
2429 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2579 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/
H A Dmips.c1247 #define MT32 INSN_MT macro
2577 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, MT32 },
2578 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2641 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, MT32 },
2642 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2645 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 },
2646 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2649 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 },
2650 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 },
2800 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP|WR_d, 0, MT32 },
[all …]
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Dmips-opc.c381 #define MT32 ASE_MT macro
1070 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1071 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1149 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1150 {"dvpe", "t", 0x41600001, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1156 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1157 {"emt", "t", 0x41600be1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1160 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1161 {"evpe", "t", 0x41600021, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1372 {"mftdsp", "d", 0x41100021, 0xffff07ff, WR_1|TRAP, 0, 0, MT32, 0 },
[all …]
/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/
H A Dmips-opc.c389 #define MT32 ASE_MT macro
1103 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1104 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1180 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1181 {"dvpe", "t", 0x41600001, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1187 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1188 {"emt", "t", 0x41600be1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1191 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1192 {"evpe", "t", 0x41600021, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1407 {"mftdsp", "d", 0x41100021, 0xffff07ff, WR_1|TRAP, 0, 0, MT32, 0 },
[all …]
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Dmips-opc.c381 #define MT32 ASE_MT macro
1070 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1071 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1149 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1150 {"dvpe", "t", 0x41600001, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1156 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1157 {"emt", "t", 0x41600be1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1160 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1161 {"evpe", "t", 0x41600021, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1372 {"mftdsp", "d", 0x41100021, 0xffff07ff, WR_1|TRAP, 0, 0, MT32, 0 },
[all …]
/dports/devel/gdb/gdb-11.1/opcodes/
H A Dmips-opc.c389 #define MT32 ASE_MT macro
1103 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1104 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1180 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1181 {"dvpe", "t", 0x41600001, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1187 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1188 {"emt", "t", 0x41600be1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1191 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1192 {"evpe", "t", 0x41600021, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1407 {"mftdsp", "d", 0x41100021, 0xffff07ff, WR_1|TRAP, 0, 0, MT32, 0 },
[all …]
/dports/devel/gnulibiberty/binutils-2.37/opcodes/
H A Dmips-opc.c389 #define MT32 ASE_MT macro
1103 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1104 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1180 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1181 {"dvpe", "t", 0x41600001, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1187 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1188 {"emt", "t", 0x41600be1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1191 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1192 {"evpe", "t", 0x41600021, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1407 {"mftdsp", "d", 0x41100021, 0xffff07ff, WR_1|TRAP, 0, 0, MT32, 0 },
[all …]
/dports/devel/binutils/binutils-2.37/opcodes/
H A Dmips-opc.c389 #define MT32 ASE_MT macro
1103 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1104 {"dmt", "t", 0x41600bc1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1180 {"dvpe", "", 0x41600001, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1181 {"dvpe", "t", 0x41600001, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1187 {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1188 {"emt", "t", 0x41600be1, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1191 {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, 0, MT32, 0 },
1192 {"evpe", "t", 0x41600021, 0xffe0ffff, WR_1|TRAP, 0, 0, MT32, 0 },
1407 {"mftdsp", "d", 0x41100021, 0xffff07ff, WR_1|TRAP, 0, 0, MT32, 0 },
[all …]
/dports/audio/playmidi/playmidi-2.4/
H A Dplaymidi.c49 int seqfd, find_header = 0, MT32 = 0; variable
262 MT32++;
495 MT32 ? mt32pgm[PGM] : PGM);
H A Demumidi.c23 extern int chanmask, perc, ticks, dochan, wantopl3, MT32;
84 if (MT32 && pgm < 128)
/dports/audio/timidity/timidity-0.2i/
H A Dmt32.cfg20 # This doesn't really make MT32 files sound _good_ on TiMidity,
/dports/games/exult/exult-snapshot-v1.7.0.20211128/
H A DREADME1035 * MT32
1040 …l convert the MT32 patches to their equivalent GS patches. This will be a more accurate conversion…
1042 …hat have a MT32 patch bank installed in Bank 127. Some GS implementation have this, some don't. On…
1043 * Fake MT32
1044 …MT32 but don't support SysEx messages. Use that option if you have a SoundFont or similar loaded f…
1150 …(Roland MT-32)" and "Sound pack for Serpent Isle (Roland MT-32)" are the Roland MT32 sound effects.
2151 * 3.2. MIDI Music Fluidsynth support is not compiled into the snapshots, also MT32 is supported on …
2170 …igital Wave Sound Effects Exult finds and uses the SFX pack automatically and defaults to MT32 SFX.
2179 …igital Wave Sound Effects Exult finds and uses the SFX pack automatically and defaults to MT32 SFX.
2190 * 3.2. MIDI Music the MT32 option will no longer crash Exult on OS X.
[all …]
/dports/audio/guspat/timidity/
H A Dmt32.cfg20 # This doesn't really make MT32 files sound _good_ on TiMidity,

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