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Searched refs:MVBAR_ADDR (Results 1 – 18 of 18) sorted by relevance

/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/arm/
H A Draspi.c26 #define MVBAR_ADDR 0x400 /* secure vectors */ macro
27 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
58 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); in write_smpboot()
103 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in write_board_setup()
H A Dhighbank.c42 #define MVBAR_ADDR 0x200 macro
43 #define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
52 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in hb_write_board_setup()
/dports/emulators/qemu42/qemu-4.2.1/hw/arm/
H A Draspi.c26 #define MVBAR_ADDR 0x400 /* secure vectors */ macro
27 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
58 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); in write_smpboot()
105 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in write_board_setup()
H A Dhighbank.c44 #define MVBAR_ADDR 0x200 macro
45 #define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
54 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in hb_write_board_setup()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/arm/
H A Draspi.c26 #define MVBAR_ADDR 0x400 /* secure vectors */ macro
27 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
58 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); in write_smpboot()
105 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in write_board_setup()
H A Dhighbank.c44 #define MVBAR_ADDR 0x200 macro
45 #define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
54 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in hb_write_board_setup()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/arm/
H A Draspi.c28 #define MVBAR_ADDR 0x400 /* secure vectors */ macro
29 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
150 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); in write_smpboot()
197 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in write_board_setup()
H A Dhighbank.c44 #define MVBAR_ADDR 0x200 macro
45 #define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
54 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in hb_write_board_setup()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/arm/
H A Draspi.c29 #define MVBAR_ADDR 0x400 /* secure vectors */ macro
30 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
151 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); in write_smpboot()
198 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in write_board_setup()
H A Dhighbank.c44 #define MVBAR_ADDR 0x200 macro
45 #define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
54 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in hb_write_board_setup()
/dports/emulators/qemu/qemu-6.2.0/hw/arm/
H A Draspi.c28 #define MVBAR_ADDR 0x400 /* secure vectors */ macro
29 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
143 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); in write_smpboot()
190 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in write_board_setup()
H A Dhighbank.c45 #define MVBAR_ADDR 0x200 macro
46 #define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
55 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in hb_write_board_setup()
/dports/emulators/qemu60/qemu-6.0.0/hw/arm/
H A Draspi.c30 #define MVBAR_ADDR 0x400 /* secure vectors */ macro
31 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
145 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); in write_smpboot()
192 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in write_board_setup()
H A Dhighbank.c46 #define MVBAR_ADDR 0x200 macro
47 #define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
56 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in hb_write_board_setup()
/dports/emulators/qemu5/qemu-5.2.0/hw/arm/
H A Draspi.c30 #define MVBAR_ADDR 0x400 /* secure vectors */ macro
31 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
145 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); in write_smpboot()
192 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in write_board_setup()
H A Dhighbank.c45 #define MVBAR_ADDR 0x200 macro
46 #define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
55 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in hb_write_board_setup()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/arm/
H A Draspi.c28 #define MVBAR_ADDR 0x400 /* secure vectors */ macro
29 #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */
143 QEMU_BUILD_BUG_ON(SMPBOOT_ADDR + sizeof(smpboot) > MVBAR_ADDR); in write_smpboot()
190 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in write_board_setup()
H A Dhighbank.c45 #define MVBAR_ADDR 0x200 macro
46 #define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
55 arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); in hb_write_board_setup()