| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11196 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
11201 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
11202 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
11212 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11228 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
11233 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
11234 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
11244 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12238 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
12243 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
12244 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
12254 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12810 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
12815 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
12816 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
12826 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 12810 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
12815 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
12816 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
12826 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 13524 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
13529 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
13530 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
13540 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 13524 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
13529 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
13530 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
13540 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 13524 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
13529 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
13530 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
13540 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 13781 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
13786 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
13787 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
13797 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 13524 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
13529 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
13530 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
13540 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 13524 SDValue N00Source = N00->getOperand(0); in performConcatVectorsCombine() local
13529 if (N00Source == N10Source && N01Source == N11Source && in performConcatVectorsCombine()
13530 N00Source.getValueType() == VT && N01Source.getValueType() == VT) { in performConcatVectorsCombine()
13540 return DAG.getNode(N0Opc, dl, VT, N00Source, N01Source); in performConcatVectorsCombine()
|