| /dports/editors/uemacs/uemacs-4.0/h/ |
| H A D | edef.h | 16 NOSHARE short kbdm[NKBDM]; /* Macro */
195 NOSHARE int matchlen;
196 NOSHARE int matchoff;
197 NOSHARE LINE *matchline;
198 NOSHARE char *patmatch = NULL;
426 NOSHARE extern int matchlen;
427 NOSHARE extern int matchoff;
428 NOSHARE extern LINE *matchline;
429 NOSHARE extern char *patmatch;
432 NOSHARE extern short int magical;
[all …]
|
| H A D | evar.h | 11 NOSHARE char *envars[] = {
215 NOSHARE UFUNC funcs[] = {
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 47 # NOSHARE: stack:
48 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
49 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
50 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
51 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
52 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 47 # NOSHARE: stack:
48 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
49 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
50 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
51 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
52 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 50 # NOSHARE: stack:
51 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
52 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
57 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
58 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
59 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 50 # NOSHARE: stack:
51 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
52 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
57 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
58 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
59 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 50 # NOSHARE: stack:
51 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
52 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
57 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
58 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
59 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 47 # NOSHARE: stack:
48 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
49 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
50 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
51 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
52 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 47 # NOSHARE: stack:
48 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
49 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
50 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
51 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
52 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 50 # NOSHARE: stack:
51 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
52 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
57 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
58 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
59 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 50 # NOSHARE: stack:
51 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
52 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
57 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
58 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
59 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 47 # NOSHARE: stack:
48 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
49 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
50 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
51 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
52 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 47 # NOSHARE: stack:
48 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
49 # NOSHARE: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
50 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
51 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
52 # NOSHARE: stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
55 # NOSHARE: stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
57 # NOSHARE: - { id: 3, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
[all …]
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 50 # NOSHARE: stack:
51 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
52 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
57 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
58 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
59 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 47 # NOSHARE: stack:
48 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
49 # NOSHARE: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
50 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
51 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
52 # NOSHARE: stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
55 # NOSHARE: stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
57 # NOSHARE: - { id: 3, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
[all …]
|
| /dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 47 # NOSHARE: stack:
48 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
49 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
50 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
51 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
52 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 47 # NOSHARE: stack:
48 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
49 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
50 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
51 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
52 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/AMDGPU/ |
| H A D | sgpr-spill-wrong-stack-id.mir | 47 # NOSHARE: stack:
48 # NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
49 # NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
50 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
51 # NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
52 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
53 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
54 # NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
55 # NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
56 # NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
[all …]
|
| /dports/archivers/unzip/unzip60/vms/ |
| H A D | descrip_src.mms | 291 # Omit shareable image options file for NOSHARE.
294 .IFDEF NOSHARE # NOSHARE
297 .ELSE # NOSHARE
300 .ENDIF # NOSHARE
304 .IFDEF NOSHARE # NOSHARE
317 # LINK NOSHARE options.
319 .IFDEF NOSHARE # NOSHARE
330 .IFDEF OLDVAX_$(NOSHARE) # OLDVAX_$(NOSHARE)
338 .IFDEF OLDVAX_$(NOSHARE) # OLDVAX_$(NOSHARE)
349 .ELSE # NOSHARE
[all …]
|
| /dports/science/InsightToolkit/ITK-5.0.1/Modules/ThirdParty/TIFF/src/itktiff/ |
| H A D | tif_vms.c | 39 #define NOSHARE noshare macro
41 #define NOSHARE macro
316 NOSHARE TIFFErrorHandler _TIFFwarningHandler = vmsWarningHandler
331 NOSHARE TIFFErrorHandler _TIFFerrorHandler = vmsErrorHandler
|
| /dports/x11-toolkits/wxgtk28-contrib/wxGTK-2.8.12/src/tiff/ |
| H A D | tif_vms.c | 39 #define NOSHARE noshare macro
41 #define NOSHARE macro
316 NOSHARE TIFFErrorHandler _TIFFwarningHandler = vmsWarningHandler
331 NOSHARE TIFFErrorHandler _TIFFerrorHandler = vmsErrorHandler
|
| /dports/x11-toolkits/wxgtk28-contrib-common/wxGTK-2.8.12/src/tiff/ |
| H A D | tif_vms.c | 39 #define NOSHARE noshare macro
41 #define NOSHARE macro
316 NOSHARE TIFFErrorHandler _TIFFwarningHandler = vmsWarningHandler
331 NOSHARE TIFFErrorHandler _TIFFerrorHandler = vmsErrorHandler
|
| /dports/x11-toolkits/wxgtk28/wxGTK-2.8.12/src/tiff/ |
| H A D | tif_vms.c | 39 #define NOSHARE noshare macro
41 #define NOSHARE macro
316 NOSHARE TIFFErrorHandler _TIFFwarningHandler = vmsWarningHandler
331 NOSHARE TIFFErrorHandler _TIFFerrorHandler = vmsErrorHandler
|
| /dports/x11-toolkits/wxgtk28-common/wxGTK-2.8.12/src/tiff/ |
| H A D | tif_vms.c | 39 #define NOSHARE noshare macro
41 #define NOSHARE macro
316 NOSHARE TIFFErrorHandler _TIFFwarningHandler = vmsWarningHandler
331 NOSHARE TIFFErrorHandler _TIFFerrorHandler = vmsErrorHandler
|
| /dports/math/vtk6/VTK-6.2.0/ThirdParty/tiff/vtktiff/ |
| H A D | tif_vms.c | 39 #define NOSHARE noshare macro
41 #define NOSHARE macro
316 NOSHARE TIFFErrorHandler _TIFFwarningHandler = vmsWarningHandler
331 NOSHARE TIFFErrorHandler _TIFFerrorHandler = vmsErrorHandler
|