| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | nv04.c | 78 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); in nv04_fifo_pause()
205 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); in nv04_fifo_cache_error()
278 u32 stat = nvkm_rd32(device, NV03_PFIFO_INTR_0) & mask; in nv04_fifo_intr()
299 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_SEMAPHORE); in nv04_fifo_intr()
324 nvkm_wr32(device, NV03_PFIFO_INTR_0, stat); in nv04_fifo_intr()
351 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv04_fifo_init()
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| H A D | nv17.c | 72 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv17_fifo_init()
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| H A D | regsnv04.h | 8 #define NV03_PFIFO_INTR_0 0x00002100 macro
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| H A D | nv40.c | 103 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv40_fifo_init()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | nv04.c | 78 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); in nv04_fifo_pause()
205 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); in nv04_fifo_cache_error()
278 u32 stat = nvkm_rd32(device, NV03_PFIFO_INTR_0) & mask; in nv04_fifo_intr()
299 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_SEMAPHORE); in nv04_fifo_intr()
324 nvkm_wr32(device, NV03_PFIFO_INTR_0, stat); in nv04_fifo_intr()
351 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv04_fifo_init()
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| H A D | nv17.c | 72 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv17_fifo_init()
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| H A D | regsnv04.h | 8 #define NV03_PFIFO_INTR_0 0x00002100 macro
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| H A D | nv40.c | 103 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv40_fifo_init()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| H A D | nv04.c | 78 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); in nv04_fifo_pause()
205 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); in nv04_fifo_cache_error()
278 u32 stat = nvkm_rd32(device, NV03_PFIFO_INTR_0) & mask; in nv04_fifo_intr()
299 nvkm_wr32(device, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_SEMAPHORE); in nv04_fifo_intr()
324 nvkm_wr32(device, NV03_PFIFO_INTR_0, stat); in nv04_fifo_intr()
351 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv04_fifo_init()
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| H A D | nv17.c | 72 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv17_fifo_init()
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| H A D | regsnv04.h | 8 #define NV03_PFIFO_INTR_0 0x00002100 macro
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| H A D | nv40.c | 103 nvkm_wr32(device, NV03_PFIFO_INTR_0, 0xffffffff); in nv40_fifo_init()
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| /dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/ |
| H A D | nouveau_engine_fifo_nv04.c | 327 nv_wr32(priv, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); in nv04_fifo_pause()
439 nv_wr32(priv, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); in nv04_fifo_cache_error()
508 while ((status = nv_rd32(priv, NV03_PFIFO_INTR_0)) && (cnt++ < 100)) { in nv04_fifo_intr()
530 nv_wr32(priv, NV03_PFIFO_INTR_0, in nv04_fifo_intr()
556 nv_wr32(priv, NV03_PFIFO_INTR_0, status); in nv04_fifo_intr()
631 nv_wr32(priv, NV03_PFIFO_INTR_0, 0xffffffff); in nv04_fifo_init()
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| H A D | nv04.h | 9 #define NV03_PFIFO_INTR_0 0x00002100 macro
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| H A D | nouveau_engine_fifo_nv17.c | 195 nv_wr32(priv, NV03_PFIFO_INTR_0, 0xffffffff); in nv17_fifo_init()
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| H A D | nouveau_engine_fifo_nv40.c | 337 nv_wr32(priv, NV03_PFIFO_INTR_0, 0xffffffff); in nv40_fifo_init()
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| /dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm/dist/shared-core/ |
| H A D | nouveau_irq.c | 77 while ((status = NV_READ(NV03_PFIFO_INTR_0))) { in nouveau_fifo_irq_handler()
106 NV_WRITE(NV03_PFIFO_INTR_0, NV_PFIFO_INTR_CACHE_ERROR); in nouveau_fifo_irq_handler()
113 NV_WRITE(NV03_PFIFO_INTR_0, NV_PFIFO_INTR_DMA_PUSHER); in nouveau_fifo_irq_handler()
122 NV_WRITE(NV03_PFIFO_INTR_0, status); in nouveau_fifo_irq_handler()
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| H A D | nv50_fifo.c | 117 NV_WRITE(NV03_PFIFO_INTR_0, 0xFFFFFFFF); in nv50_fifo_init_intr()
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| H A D | nouveau_reg.h | 416 #define NV03_PFIFO_INTR_0 0x00002100 macro
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| H A D | nouveau_fifo.c | 106 NV_WRITE(NV03_PFIFO_INTR_0, 0xFFFFFFFF); in nouveau_fifo_init()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_reg.h | 444 #define NV03_PFIFO_INTR_0 0x00002100 macro
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_reg.h | 444 #define NV03_PFIFO_INTR_0 0x00002100 macro
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| /dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/drm2/dist/drm/nouveau/ |
| H A D | nouveau_reg.h | 443 #define NV03_PFIFO_INTR_0 0x00002100 macro
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_reg.h | 444 #define NV03_PFIFO_INTR_0 0x00002100 macro
|