/dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|
/dports/lang/clover/mesa-21.3.6/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|
/dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|
/dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|
/dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|
/dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|
/dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|
/dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|
/dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|
/dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|
/dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/nouveau/nv30/ |
H A D | nvfx_fragprog.c | 205 hw[0] |= (insn.op << NVFX_FP_OP_OPCODE_SHIFT); in nvfx_fp_emit() 253 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_if() 277 hw[0] = (NV40_FP_OP_BRA_OPCODE_CAL << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_cal() 296 hw[0] = (NV40_FP_OP_BRA_OPCODE_RET << NVFX_FP_OP_OPCODE_SHIFT); in nv40_fp_ret() 313 hw[0] = (NV40_FP_OP_BRA_OPCODE_REP << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_rep() 342 hw[0] = (NV40_FP_OP_BRA_OPCODE_IF << NVFX_FP_OP_OPCODE_SHIFT) | 367 hw[0] = (NV40_FP_OP_BRA_OPCODE_BRK << NVFX_FP_OP_OPCODE_SHIFT) | in nv40_fp_brk()
|
H A D | nvfx_shader.h | 209 #define NVFX_FP_OP_OPCODE_SHIFT 24 macro
|