| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13062 {Chain, N0, NegN1}); in visitSTRICT_FADD()
13123 if (SDValue NegN1 = in visitFSUB() local
13125 return NegN1; in visitFSUB()
13143 if (SDValue NegN1 = in visitFSUB() local
13145 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1); in visitFSUB()
13230 SDValue NegN1 = in visitFMUL() local
13232 if (NegN0 && NegN1 && in visitFMUL()
13321 SDValue NegN1 = in visitFMA() local
13323 if (NegN0 && NegN1 && in visitFMA()
13625 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13814 {Chain, N0, NegN1}); in visitSTRICT_FADD()
13877 if (SDValue NegN1 = in visitFSUB() local
13879 return NegN1; in visitFSUB()
13898 if (SDValue NegN1 = in visitFSUB() local
13900 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1); in visitFSUB()
13985 SDValue NegN1 = in visitFMUL() local
13987 if (NegN0 && NegN1 && in visitFMUL()
14076 SDValue NegN1 = in visitFMA() local
14078 if (NegN0 && NegN1 && in visitFMA()
14380 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13325 {Chain, N0, NegN1}); in visitSTRICT_FADD()
13388 if (SDValue NegN1 = in visitFSUB() local
13390 return NegN1; in visitFSUB()
13409 if (SDValue NegN1 = in visitFSUB() local
13411 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1); in visitFSUB()
13496 SDValue NegN1 = in visitFMUL() local
13498 if (NegN0 && NegN1 && in visitFMUL()
13587 SDValue NegN1 = in visitFMA() local
13589 if (NegN0 && NegN1 && in visitFMA()
13891 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13814 {Chain, N0, NegN1}); in visitSTRICT_FADD()
13877 if (SDValue NegN1 = in visitFSUB() local
13879 return NegN1; in visitFSUB()
13898 if (SDValue NegN1 = in visitFSUB() local
13900 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1); in visitFSUB()
13985 SDValue NegN1 = in visitFMUL() local
13987 if (NegN0 && NegN1 && in visitFMUL()
14076 SDValue NegN1 = in visitFMA() local
14078 if (NegN0 && NegN1 && in visitFMA()
14380 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13814 {Chain, N0, NegN1}); in visitSTRICT_FADD()
13877 if (SDValue NegN1 = in visitFSUB() local
13879 return NegN1; in visitFSUB()
13898 if (SDValue NegN1 = in visitFSUB() local
13900 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1); in visitFSUB()
13985 SDValue NegN1 = in visitFMUL() local
13987 if (NegN0 && NegN1 && in visitFMUL()
14076 SDValue NegN1 = in visitFMA() local
14078 if (NegN0 && NegN1 && in visitFMA()
14380 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13325 {Chain, N0, NegN1}); in visitSTRICT_FADD()
13388 if (SDValue NegN1 = in visitFSUB() local
13390 return NegN1; in visitFSUB()
13409 if (SDValue NegN1 = in visitFSUB() local
13411 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1); in visitFSUB()
13496 SDValue NegN1 = in visitFMUL() local
13498 if (NegN0 && NegN1 && in visitFMUL()
13587 SDValue NegN1 = in visitFMA() local
13589 if (NegN0 && NegN1 && in visitFMA()
13891 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13814 {Chain, N0, NegN1}); in visitSTRICT_FADD()
13877 if (SDValue NegN1 = in visitFSUB() local
13879 return NegN1; in visitFSUB()
13898 if (SDValue NegN1 = in visitFSUB() local
13900 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1); in visitFSUB()
13985 SDValue NegN1 = in visitFMUL() local
13987 if (NegN0 && NegN1 && in visitFMUL()
14076 SDValue NegN1 = in visitFMA() local
14078 if (NegN0 && NegN1 && in visitFMA()
14380 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13814 {Chain, N0, NegN1}); in visitSTRICT_FADD()
13877 if (SDValue NegN1 = in visitFSUB() local
13879 return NegN1; in visitFSUB()
13898 if (SDValue NegN1 = in visitFSUB() local
13900 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1); in visitFSUB()
13985 SDValue NegN1 = in visitFMUL() local
13987 if (NegN0 && NegN1 && in visitFMUL()
14076 SDValue NegN1 = in visitFMA() local
14078 if (NegN0 && NegN1 && in visitFMA()
14380 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 13850 {Chain, N0, NegN1}); in visitSTRICT_FADD()
13913 if (SDValue NegN1 = in visitFSUB() local
13915 return NegN1; in visitFSUB()
13934 if (SDValue NegN1 = in visitFSUB() local
13936 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1); in visitFSUB()
14024 SDValue NegN1 = in visitFMUL() local
14026 if (NegN0 && NegN1 && in visitFMUL()
14115 SDValue NegN1 = in visitFMA() local
14117 if (NegN0 && NegN1 && in visitFMA()
14419 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 12737 if (SDValue NegN1 = TLI.getCheaperNegatedExpression( in visitFADD() local
12927 if (SDValue NegN1 = in visitFSUB() local
12929 return NegN1; in visitFSUB()
12947 if (SDValue NegN1 = in visitFSUB() local
12949 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1, Flags); in visitFSUB()
13040 SDValue NegN1 = in visitFMUL() local
13042 if (NegN0 && NegN1 && in visitFMUL()
13130 SDValue NegN1 = in visitFMA() local
13132 if (NegN0 && NegN1 && in visitFMA()
13424 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 12645 if (SDValue NegN1 = TLI.getCheaperNegatedExpression( in visitFADD() local
12835 if (SDValue NegN1 = in visitFSUB() local
12837 return NegN1; in visitFSUB()
12855 if (SDValue NegN1 = in visitFSUB() local
12857 return DAG.getNode(ISD::FADD, DL, VT, N0, NegN1, Flags); in visitFSUB()
12948 SDValue NegN1 = in visitFMUL() local
12950 if (NegN0 && NegN1 && in visitFMUL()
13038 SDValue NegN1 = in visitFMA() local
13040 if (NegN0 && NegN1 && in visitFMA()
13332 SDValue NegN1 = in visitFDIV() local
[all …]
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2573 SDValue NegN1 = DAG.getNode(ISD::FNEG, dl, N0.getValueType(), N1); in SimplifySetCC() local
2574 return DAG.getSetCC(dl, VT, N0.getOperand(0), NegN1, SwapCond); in SimplifySetCC()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2840 SDValue NegN1 = DAG.getNode(ISD::FNEG, dl, N0.getValueType(), N1);
2841 return DAG.getSetCC(dl, VT, N0.getOperand(0), NegN1, SwapCond);
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16281 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() local
16287 } else if (NegN1) { in getNegatedExpression()
16289 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags); in getNegatedExpression()
16750 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike() local
16751 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags); in combineFMALike()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16510 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() local
16516 } else if (NegN1) { in getNegatedExpression()
16518 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags); in getNegatedExpression()
16980 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike() local
16981 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags); in combineFMALike()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 15865 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() local
15871 } else if (NegN1) { in getNegatedExpression()
15873 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags); in getNegatedExpression()
16334 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike() local
16335 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags); in combineFMALike()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16536 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() local
16542 } else if (NegN1) { in getNegatedExpression()
16544 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags); in getNegatedExpression()
17006 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike() local
17007 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags); in combineFMALike()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 15865 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() local
15871 } else if (NegN1) { in getNegatedExpression()
15873 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags); in getNegatedExpression()
16334 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike() local
16335 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags); in combineFMALike()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 3307 SDValue NegN1 = DAG.getNode(ISD::FNEG, dl, N0.getValueType(), N1); in SimplifySetCC() local
3308 return DAG.getSetCC(dl, VT, N0.getOperand(0), NegN1, SwapCond); in SimplifySetCC()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16488 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize,
16494 } else if (NegN1) {
16496 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags);
16965 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize))
16966 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags);
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16488 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() local
16494 } else if (NegN1) { in getNegatedExpression()
16496 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags); in getNegatedExpression()
16965 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike() local
16966 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags); in combineFMALike()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16488 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() local
16494 } else if (NegN1) { in getNegatedExpression()
16496 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags); in getNegatedExpression()
16965 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike() local
16966 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags); in combineFMALike()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16645 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() local
16651 } else if (NegN1) { in getNegatedExpression()
16653 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags); in getNegatedExpression()
17122 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike() local
17123 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags); in combineFMALike()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16488 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() local
16494 } else if (NegN1) { in getNegatedExpression()
16496 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags); in getNegatedExpression()
16965 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike() local
16966 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags); in combineFMALike()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 16488 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() local
16494 } else if (NegN1) { in getNegatedExpression()
16496 return DAG.getNode(Opc, Loc, VT, N0, NegN1, NegN2, Flags); in getNegatedExpression()
16965 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike() local
16966 return DAG.getNode(invertFMAOpcode(Opc), Loc, VT, N0, NegN1, N2, Flags); in combineFMALike()
|