| /dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/lib/Target/X86/ |
| H A D | X86JITInfo.cpp | 468 bool NotCC = (Target != (void*)(intptr_t)X86CompilationCallback && in emitFunctionStub() local
471 bool NotCC = Target != (void*)(intptr_t)X86CompilationCallback; in emitFunctionStub()
475 if (NotCC) { in emitFunctionStub()
|
| /dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 2660 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
2663 if (!LegalOperations || TLI.isCondCodeLegal(NotCC, LHS.getValueType())) { in visitXOR()
2668 return DAG.getSetCC(N->getDebugLoc(), VT, LHS, RHS, NotCC); in visitXOR()
2671 N0.getOperand(3), NotCC); in visitXOR()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7570 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7573 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7578 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7581 N0.getOperand(3), NotCC); in visitXOR()
7588 DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7416 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7419 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7424 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7427 N0.getOperand(3), NotCC); in visitXOR()
7433 SDValue SetCC = DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7802 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7805 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7810 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7813 N0.getOperand(3), NotCC); in visitXOR()
7820 DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7608 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7611 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7616 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7619 N0.getOperand(3), NotCC); in visitXOR()
7626 DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7323 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7326 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7331 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7334 N0.getOperand(3), NotCC); in visitXOR()
7340 SDValue SetCC = DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7802 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7805 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7810 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7813 N0.getOperand(3), NotCC); in visitXOR()
7820 DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7802 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7805 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7810 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7813 N0.getOperand(3), NotCC); in visitXOR()
7820 DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7608 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7611 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7616 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7619 N0.getOperand(3), NotCC); in visitXOR()
7626 DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7802 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7805 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7810 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7813 N0.getOperand(3), NotCC); in visitXOR()
7820 DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7802 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7805 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7810 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7813 N0.getOperand(3), NotCC); in visitXOR()
7820 DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6170 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
6173 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
6178 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
6181 N0.getOperand(3), NotCC); in visitXOR()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6011 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
6015 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
6020 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
6023 N0.getOperand(3), NotCC); in visitXOR()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7821 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7824 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7829 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7832 N0.getOperand(3), NotCC); in visitXOR()
7839 DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC, in visitXOR()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7069 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7072 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7077 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7080 N0.getOperand(3), NotCC); in visitXOR()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7062 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7065 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7070 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7073 N0.getOperand(3), NotCC); in visitXOR()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7069 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
7072 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
7077 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
7080 N0.getOperand(3), NotCC); in visitXOR()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 6931 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR() local
6934 TLI.isCondCodeLegal(NotCC, LHS.getSimpleValueType())) { in visitXOR()
6939 return DAG.getSetCC(SDLoc(N0), VT, LHS, RHS, NotCC); in visitXOR()
6942 N0.getOperand(3), NotCC); in visitXOR()
|