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Searched refs:OFFB_FPROUND (Results 1 – 9 of 9) sorted by relevance

/dports/security/py-pyvex/pyvex-9.0.5405/vex/priv/
H A Dguest_x86_toIR.c281 #define OFFB_FPROUND offsetof(VexGuestX86State,guest_FPROUND) macro
3660 return IRExpr_Get( OFFB_FPROUND, Ity_I32 ); in get_fpround()
3665 stmt( IRStmt_Put( OFFB_FPROUND, e ) ); in put_fpround()
4275 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
4370 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
5156 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
5416 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
5474 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
8828 d->fxState[3].offset = OFFB_FPROUND; in disInstr_X86_WRK()
8902 d->fxState[3].offset = OFFB_FPROUND; in disInstr_X86_WRK()
H A Dguest_amd64_toIR.c430 #define OFFB_FPROUND offsetof(VexGuestAMD64State,guest_FPROUND) macro
5176 return unop(Iop_64to32, IRExpr_Get( OFFB_FPROUND, Ity_I64 )); in get_fpround()
5182 stmt( IRStmt_Put( OFFB_FPROUND, unop(Iop_32Uto64,e) ) ); in put_fpround()
5438 d->fxState[3].offset = OFFB_FPROUND; in gen_FINIT_SEQUENCE()
5817 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
5913 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
6809 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
6889 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
11871 d0->fxState[3].offset = OFFB_FPROUND; in gen_XSAVE_SEQUENCE()
12093 d0->fxState[3].offset = OFFB_FPROUND; in gen_XRSTOR_SEQUENCE()
H A Dguest_ppc_toIR.c288 #define OFFB_FPROUND offsetofPPCGuestState(guest_FPROUND) macro
2977 assign( val, unop( Iop_8Uto32, IRExpr_Get( OFFB_FPROUND, Ity_I8 ) ) ); in getGST_masked()
3247 OFFB_FPROUND, in putGST_masked()
3259 unop(Iop_8Uto32, IRExpr_Get(OFFB_FPROUND,Ity_I8)), in putGST_masked()
/dports/devel/valgrind-lts/valgrind-dragonfly-dragonfly/VEX/priv/
H A Dguest_x86_toIR.c255 #define OFFB_FPROUND offsetof(VexGuestX86State,guest_FPROUND) macro
3497 return IRExpr_Get( OFFB_FPROUND, Ity_I32 ); in get_fpround()
3502 stmt( IRStmt_Put( OFFB_FPROUND, e ) ); in put_fpround()
4056 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
4151 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
4867 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
5071 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
5129 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
8416 d->fxState[3].offset = OFFB_FPROUND; in disInstr_X86_WRK()
8490 d->fxState[3].offset = OFFB_FPROUND; in disInstr_X86_WRK()
H A Dguest_amd64_toIR.c420 #define OFFB_FPROUND offsetof(VexGuestAMD64State,guest_FPROUND) macro
5085 return unop(Iop_64to32, IRExpr_Get( OFFB_FPROUND, Ity_I64 )); in get_fpround()
5091 stmt( IRStmt_Put( OFFB_FPROUND, unop(Iop_32Uto64,e) ) ); in put_fpround()
5347 d->fxState[3].offset = OFFB_FPROUND; in gen_FINIT_SEQUENCE()
5718 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
5814 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
6692 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
6772 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
11682 d0->fxState[3].offset = OFFB_FPROUND; in gen_XSAVE_SEQUENCE()
11904 d0->fxState[3].offset = OFFB_FPROUND; in gen_XRSTOR_SEQUENCE()
H A Dguest_ppc_toIR.c283 #define OFFB_FPROUND offsetofPPCGuestState(guest_FPROUND) macro
3124 unop( Iop_8Uto32, IRExpr_Get( OFFB_FPROUND, Ity_I8 ) ), in getGST_masked()
3405 OFFB_FPROUND, in putGST_masked()
3417 unop(Iop_8Uto32, IRExpr_Get(OFFB_FPROUND,Ity_I8)), in putGST_masked()
/dports/devel/valgrind/valgrind-dragonfly-dragonfly/VEX/priv/
H A Dguest_x86_toIR.c255 #define OFFB_FPROUND offsetof(VexGuestX86State,guest_FPROUND) macro
3497 return IRExpr_Get( OFFB_FPROUND, Ity_I32 ); in get_fpround()
3502 stmt( IRStmt_Put( OFFB_FPROUND, e ) ); in put_fpround()
4056 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
4151 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
4867 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
5071 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
5129 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
8416 d->fxState[3].offset = OFFB_FPROUND; in disInstr_X86_WRK()
8490 d->fxState[3].offset = OFFB_FPROUND; in disInstr_X86_WRK()
H A Dguest_amd64_toIR.c420 #define OFFB_FPROUND offsetof(VexGuestAMD64State,guest_FPROUND) macro
5085 return unop(Iop_64to32, IRExpr_Get( OFFB_FPROUND, Ity_I64 )); in get_fpround()
5091 stmt( IRStmt_Put( OFFB_FPROUND, unop(Iop_32Uto64,e) ) ); in put_fpround()
5347 d->fxState[3].offset = OFFB_FPROUND; in gen_FINIT_SEQUENCE()
5718 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
5814 d->fxState[2].offset = OFFB_FPROUND; in dis_FPU()
6692 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
6772 d->fxState[3].offset = OFFB_FPROUND; in dis_FPU()
11682 d0->fxState[3].offset = OFFB_FPROUND; in gen_XSAVE_SEQUENCE()
11904 d0->fxState[3].offset = OFFB_FPROUND; in gen_XRSTOR_SEQUENCE()
H A Dguest_ppc_toIR.c283 #define OFFB_FPROUND offsetofPPCGuestState(guest_FPROUND) macro
3124 unop( Iop_8Uto32, IRExpr_Get( OFFB_FPROUND, Ity_I8 ) ), in getGST_masked()
3405 OFFB_FPROUND, in putGST_masked()
3417 unop(Iop_8Uto32, IRExpr_Get(OFFB_FPROUND,Ity_I8)), in putGST_masked()