/dports/emulators/unicorn/unicorn-1.0.2/qemu/tcg/mips/ |
H A D | tcg-target.c | 267 OPC_SLTIU = 0x0B << 26, enumerator 597 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1); in tcg_out_setcond() 1261 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); in tcg_out_addsub2() 1271 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); in tcg_out_addsub2()
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/dports/emulators/qemu-utils/qemu-4.2.1/tcg/riscv/ |
H A D | tcg-target.inc.c | 241 OPC_SLTIU = 0x3013, enumerator 732 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, al, bl); in tcg_out_addsub2() 742 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, rl, bl); in tcg_out_addsub2() 807 tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1); in tcg_out_setcond()
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/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/tcg/mips/ |
H A D | tcg-target.c | 267 OPC_SLTIU = 0x0B << 26, 597 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1); 1261 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); 1271 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl);
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/riscv/ |
H A D | tcg-target.inc.c | 241 OPC_SLTIU = 0x3013, enumerator 732 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, al, bl); in tcg_out_addsub2() 742 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, rl, bl); in tcg_out_addsub2() 807 tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1); in tcg_out_setcond()
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/dports/emulators/qemu42/qemu-4.2.1/tcg/riscv/ |
H A D | tcg-target.inc.c | 241 OPC_SLTIU = 0x3013, enumerator 732 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, al, bl); in tcg_out_addsub2() 742 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, rl, bl); in tcg_out_addsub2() 807 tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1); in tcg_out_setcond()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/riscv/ |
H A D | tcg-target.inc.c | 241 OPC_SLTIU = 0x3013, enumerator 732 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, al, bl); in tcg_out_addsub2() 742 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, rl, bl); in tcg_out_addsub2() 807 tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1); in tcg_out_setcond()
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/dports/emulators/qemu-utils/qemu-4.2.1/tcg/mips/ |
H A D | tcg-target.inc.c | 287 OPC_SLTIU = 013 << 26, enumerator 784 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); in tcg_out_addsub2() 794 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); in tcg_out_addsub2() 833 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1); in tcg_out_setcond()
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/dports/emulators/qemu5/qemu-5.2.0/tcg/riscv/ |
H A D | tcg-target.c.inc | 239 OPC_SLTIU = 0x3013, 728 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, al, bl); 738 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, rl, bl); 803 tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1);
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/tcg/mips/ |
H A D | tcg-target.inc.c | 287 OPC_SLTIU = 013 << 26, enumerator 784 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); in tcg_out_addsub2() 794 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); in tcg_out_addsub2() 833 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1); in tcg_out_setcond()
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/dports/emulators/qemu42/qemu-4.2.1/tcg/mips/ |
H A D | tcg-target.inc.c | 287 OPC_SLTIU = 013 << 26, enumerator 784 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); in tcg_out_addsub2() 794 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); in tcg_out_addsub2() 833 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1); in tcg_out_setcond()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/tcg/mips/ |
H A D | tcg-target.inc.c | 286 OPC_SLTIU = 013 << 26, enumerator 787 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); in tcg_out_addsub2() 797 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); in tcg_out_addsub2() 836 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1); in tcg_out_setcond()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/tcg/mips/ |
H A D | tcg-target.inc.c | 287 OPC_SLTIU = 013 << 26, enumerator 784 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); in tcg_out_addsub2() 794 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); in tcg_out_addsub2() 833 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1); in tcg_out_setcond()
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/riscv/ |
H A D | tcg-target.c.inc | 211 OPC_SLTIU = 0x3013, 678 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, al, bl); 688 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, rl, bl); 740 tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1);
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/dports/emulators/qemu/qemu-6.2.0/tcg/riscv/ |
H A D | tcg-target.c.inc | 211 OPC_SLTIU = 0x3013, 678 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, al, bl); 688 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, rl, bl); 740 tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1);
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/dports/emulators/qemu60/qemu-6.0.0/tcg/riscv/ |
H A D | tcg-target.c.inc | 213 OPC_SLTIU = 0x3013, 680 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, al, bl); 690 tcg_out_opc_imm(s, OPC_SLTIU, TCG_REG_TMP0, rl, bl); 742 tcg_out_opc_imm(s, OPC_SLTIU, ret, ret, 1);
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/tcg/ |
H A D | mips16e_translate.c.inc | 546 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm); 771 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm);
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/dports/emulators/qemu/qemu-6.2.0/target/mips/tcg/ |
H A D | mips16e_translate.c.inc | 546 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm); 771 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm);
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/tcg/mips/ |
H A D | tcg-target.c.inc | 228 OPC_SLTIU = 013 << 26, 696 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); 706 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); 745 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1);
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/dports/emulators/qemu/qemu-6.2.0/tcg/mips/ |
H A D | tcg-target.c.inc | 228 OPC_SLTIU = 013 << 26, 696 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); 706 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); 745 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1);
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/dports/emulators/qemu5/qemu-5.2.0/tcg/mips/ |
H A D | tcg-target.c.inc | 284 OPC_SLTIU = 013 << 26, 781 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); 791 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); 830 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1);
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/dports/emulators/qemu60/qemu-6.0.0/tcg/mips/ |
H A D | tcg-target.c.inc | 231 OPC_SLTIU = 013 << 26, 728 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, al, bl); 738 tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); 777 tcg_out_opc_imm(s, OPC_SLTIU, ret, arg1, 1);
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/ |
H A D | translate.c | 61 OPC_SLTIU = (0x0B << 26), enumerator 2798 case OPC_SLTIU: in gen_slt_imm() 12104 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm); in decode_extended_mips16_opc() 12338 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm); in decode_mips16_opc() 15463 mips32_op = OPC_SLTIU; in decode_micromips32_opc() 19619 gen_slt_imm(ctx, OPC_SLTIU, rt, rs, extract32(ctx->opcode, 0, 12)); in decode_nanomips_32_48_opc() 24826 case OPC_SLTIU: in decode_opc()
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/dports/emulators/qemu60/qemu-6.0.0/target/mips/ |
H A D | translate.c | 55 OPC_SLTIU = (0x0B << 26), enumerator 2665 case OPC_SLTIU: in gen_slt_imm() 12963 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm); in decode_extended_mips16_opc() 13205 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm); in decode_mips16_opc() 16340 mips32_op = OPC_SLTIU; in decode_micromips32_opc() 20537 gen_slt_imm(ctx, OPC_SLTIU, rt, rs, extract32(ctx->opcode, 0, 12)); in decode_nanomips_32_48_opc() 24904 case OPC_SLTIU: in decode_opc_legacy()
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/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/ |
H A D | translate.c | 53 OPC_SLTIU = (0x0B << 26), enumerator 2587 case OPC_SLTIU: in gen_slt_imm() 11221 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm); in decode_extended_mips16_opc() 11448 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm); in decode_mips16_opc() 13830 mips32_op = OPC_SLTIU; in decode_micromips32_opc() 18734 case OPC_SLTIU: in decode_opc()
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/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/ |
H A D | translate.c | 53 OPC_SLTIU = (0x0B << 26), enumerator 2587 case OPC_SLTIU: in gen_slt_imm() 11221 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm); in decode_extended_mips16_opc() 11448 gen_slt_imm(ctx, OPC_SLTIU, 24, rx, imm); in decode_mips16_opc() 13830 mips32_op = OPC_SLTIU; in decode_micromips32_opc() 18734 case OPC_SLTIU: in decode_opc()
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