| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/include/opcode/ |
| H A D | mips.h | 145 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */
|
| /dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/include/opcode/ |
| H A D | mips.h | 146 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/include/opcode/ |
| H A D | mips.h | 145 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/devel/radare2/radare2-5.1.1/libr/asm/arch/include/opcode/ |
| H A D | mips.h | 146 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/devel/djgpp-binutils/binutils-2.17/include/opcode/ |
| H A D | mips.h | 146 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/include/opcode/ |
| H A D | mips.h | 147 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/ |
| H A D | mips-dis.c | 729 msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB;
767 msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32;
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
| H A D | mips-dis.c | 718 msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB;
756 msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32;
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
| H A D | mips-dis.c | 718 msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB;
756 msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32;
|
| /dports/devel/radare2/radare2-5.1.1/libr/asm/arch/mips/gnu/ |
| H A D | mips-dis.c | 796 msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB; in print_insn_args()
855 msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32; in print_insn_args()
|
| /dports/devel/djgpp-binutils/binutils-2.17/opcodes/ |
| H A D | mips-dis.c | 727 msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB; in print_insn_args()
765 msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32; in print_insn_args()
|
| /dports/devel/gdb761/gdb-7.6.1/include/opcode/ |
| H A D | mips.h | 153 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/opcodes/ |
| H A D | mips-dis.c | 854 msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB; in print_insn_args()
912 msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32; in print_insn_args()
|
| /dports/devel/arm-none-eabi-newlib/newlib-2.4.0/include/opcode/ |
| H A D | mips.h | 153 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/devel/binutils/binutils-2.37/include/opcode/ |
| H A D | mips.h | 155 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/lang/gnatdroid-binutils-x86/binutils-2.27/include/opcode/ |
| H A D | mips.h | 155 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/ |
| H A D | mips.h | 155 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/devel/gnulibiberty/binutils-2.37/include/opcode/ |
| H A D | mips.h | 155 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/lang/gnatdroid-binutils/binutils-2.27/include/opcode/ |
| H A D | mips.h | 155 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/devel/gdb/gdb-11.1/include/opcode/ |
| H A D | mips.h | 155 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/ |
| H A D | mips.h | 155 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
|
| /dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/ |
| H A D | mips-dis.c | 165 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
3480 msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB; in print_insn_args()
3538 msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32; in print_insn_args()
|
| /dports/emulators/qemu/qemu-6.2.0/disas/ |
| H A D | mips.c | 168 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
4279 msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB; in print_insn_args()
4420 msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32; in print_insn_args()
|
| /dports/emulators/qemu42/qemu-4.2.1/disas/ |
| H A D | mips.c | 168 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
4269 msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB; in print_insn_args()
4410 msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32; in print_insn_args()
|
| /dports/emulators/qemu60/qemu-6.0.0/disas/ |
| H A D | mips.c | 168 #define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ macro
4279 msb = (l >> OP_SH_INSMSB) & OP_MASK_INSMSB; in print_insn_args()
4420 msb = ((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + 32; in print_insn_args()
|