| /dports/emulators/vmips/vmips-1.5.1/libopcodes_mips/opcode/ |
| H A D | mips.h | 133 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/include/opcode/ |
| H A D | mips.h | 133 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */
|
| /dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/include/opcode/ |
| H A D | mips.h | 134 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/include/opcode/ |
| H A D | mips.h | 133 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/radare2/radare2-5.1.1/libr/asm/arch/include/opcode/ |
| H A D | mips.h | 134 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/djgpp-binutils/binutils-2.17/include/opcode/ |
| H A D | mips.h | 134 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/radare2/radare2-5.1.1/libr/asm/arch/mips/gnu/ |
| H A D | mips-dis.c | 832 sel = (l >> OP_SH_SEL) & OP_MASK_SEL; in print_insn_args()
876 sel = (l >> OP_SH_SEL) & OP_MASK_SEL; in print_insn_args()
1206 (l >> OP_SH_SEL) & OP_MASK_SEL); in print_insn_args()
|
| /dports/devel/djgpp-binutils/binutils-2.17/opcodes/ |
| H A D | mips-dis.c | 743 sel = (l >> OP_SH_SEL) & OP_MASK_SEL; in print_insn_args()
786 sel = (l >> OP_SH_SEL) & OP_MASK_SEL; in print_insn_args()
1098 (l >> OP_SH_SEL) & OP_MASK_SEL); in print_insn_args()
|
| /dports/devel/avr-gdb/gdb-7.3.1/include/opcode/ |
| H A D | mips.h | 135 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/avr-gdb/gdb-7.3.1/opcodes/ |
| H A D | mips-dis.c | 890 sel = (l >> OP_SH_SEL) & OP_MASK_SEL; in print_insn_args()
933 sel = (l >> OP_SH_SEL) & OP_MASK_SEL; in print_insn_args()
1316 (l >> OP_SH_SEL) & OP_MASK_SEL); in print_insn_args()
|
| /dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/ |
| H A D | mips-dis.c | 745 sel = (l >> OP_SH_SEL) & OP_MASK_SEL;
984 (l >> OP_SH_SEL) & OP_MASK_SEL);
|
| /dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
| H A D | mips-dis.c | 734 sel = (l >> OP_SH_SEL) & OP_MASK_SEL;
973 (l >> OP_SH_SEL) & OP_MASK_SEL);
|
| /dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/ |
| H A D | mips-dis.c | 734 sel = (l >> OP_SH_SEL) & OP_MASK_SEL;
973 (l >> OP_SH_SEL) & OP_MASK_SEL);
|
| /dports/devel/gdb761/gdb-7.6.1/include/opcode/ |
| H A D | mips.h | 141 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/arm-none-eabi-newlib/newlib-2.4.0/include/opcode/ |
| H A D | mips.h | 141 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/binutils/binutils-2.37/include/opcode/ |
| H A D | mips.h | 143 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/lang/gnatdroid-binutils-x86/binutils-2.27/include/opcode/ |
| H A D | mips.h | 143 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/ |
| H A D | mips.h | 143 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/gnulibiberty/binutils-2.37/include/opcode/ |
| H A D | mips.h | 143 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/lang/gnatdroid-binutils/binutils-2.27/include/opcode/ |
| H A D | mips.h | 143 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/devel/gdb/gdb-11.1/include/opcode/ |
| H A D | mips.h | 143 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/ |
| H A D | mips.h | 143 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
|
| /dports/emulators/vmips/vmips-1.5.1/libopcodes_mips/ |
| H A D | mips-dis.c | 284 (l >> OP_SH_SEL) & OP_MASK_SEL);
|
| /dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/ |
| H A D | mips-dis.c | 153 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
3516 sel = (l >> OP_SH_SEL) & OP_MASK_SEL; in print_insn_args()
3559 sel = (l >> OP_SH_SEL) & OP_MASK_SEL; in print_insn_args()
3882 (l >> OP_SH_SEL) & OP_MASK_SEL); in print_insn_args()
|
| /dports/emulators/qemu/qemu-6.2.0/disas/ |
| H A D | mips.c | 156 #define OP_MASK_SEL 0x7 /* The sel field of mfcZ and mtcZ. */ macro
4398 sel = (l >> OP_SH_SEL) & OP_MASK_SEL; in print_insn_args()
4477 sel = (l >> OP_SH_SEL) & OP_MASK_SEL; in print_insn_args()
4833 (l >> OP_SH_SEL) & OP_MASK_SEL); in print_insn_args()
|