Searched refs:P2PLL_POST0_DIV_MASK (Results 1 – 7 of 7) sorted by relevance
1218 # define P2PLL_POST0_DIV_MASK 0x00070000 macro
1345 # define P2PLL_POST0_DIV_MASK 0x00070000 macro
825 tmp = radeon_inpll( mmio, P2PLL_DIV_0 ) & ~P2PLL_POST0_DIV_MASK; in crtc2_set_regs()
1093 # define P2PLL_POST0_DIV_MASK 0x00070000 macro
1365 # define P2PLL_POST0_DIV_MASK 0x00070000 macro