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Searched refs:PCIEX_BASE_ADDRESS (Results 1 – 9 of 9) sorted by relevance

/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/
H A DUartInit.c44 #define PCIEX_BASE_ADDRESS 0xE0000000 macro
45 #define PCI_EXPRESS_BASE_ADDRESS PCIEX_BASE_ADDRESS
46 #define PciD31F0RegBase PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2TbltDevicePkg/Library/I2CLibPei/
H A DI2CAccess.h39 #define PCIEX_BASE_ADDRESS 0xE0000000 macro
40 #define PCI_EXPRESS_BASE_ADDRESS ((VOID *) (UINTN) PCIEX_BASE_ADDRESS)
H A DI2CLibPei.h23 #define PCIEX_BASE_ADDRESS 0xE0000000 macro
24 #define PciD31F0RegBase PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2TbltDevicePkg/Include/
H A DPlatformDefinitions.h48 #define PCIEX_BASE_ADDRESS EDKII_GLUE_PciExpressBaseAddress // Pci Express Configuration S…
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2TbltDevicePkg/MonoStatusCode/
H A DPlatformStatusCode.c313 #define PCIEX_BASE_ADDRESS 0xE0000000
314 #define PciD31F0RegBase PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/Vlv2TbltDevicePkg/MonoStatusCode/
H A DPlatformStatusCode.c301 #define PCIEX_BASE_ADDRESS 0xE0000000
302 #define PciD31F0RegBase PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2TbltDevicePkg/Library/I2CLibDxe/
H A DI2CLib.c29 #define PCIEX_BASE_ADDRESS 0xE0000000 macro
30 #define PCI_EXPRESS_BASE_ADDRESS ((VOID *) (UINTN) PCIEX_BASE_ADDRESS)
38 #define PCI_D31F0_REG_BASE PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2TbltDevicePkg/PlatformInitPei/
H A DPchInitPeim.c51 #define PCIEX_BASE_ADDRESS 0xE0000000
52 #define PciD31F0RegBase PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)
/dports/sysutils/edk2/edk2-platforms-89f6170d/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/
H A DPchInitPeim.c34 #define PCIEX_BASE_ADDRESS 0xE0000000
35 #define PciD31F0RegBase PCIEX_BASE_ADDRESS + (UINT32) (31 << 15)