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Searched refs:PDMA_GLO_CFG (Results 1 – 25 of 118) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/net/
H A Dmt7628-eth.c50 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
327 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
335 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
338 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
498 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/net/
H A Dmt7628-eth.c50 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
327 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
335 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
338 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
498 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/drivers/net/
H A Dmt7628-eth.c50 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
327 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
335 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
338 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
498 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/net/
H A Dmt7628-eth.c50 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
327 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
335 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
338 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
498 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/net/
H A Dmt7628-eth.c50 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
327 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
335 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
338 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
498 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/net/
H A Dmt7628-eth.c44 #define PDMA_GLO_CFG (PDMA_RELATED + 0x204) macro
342 setbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_start()
350 clrbits_le32(base + PDMA_GLO_CFG, TX_WB_DDONE | RX_DMA_EN | TX_DMA_EN); in eth_dma_stop()
353 ret = wait_for_bit_le32(base + PDMA_GLO_CFG, in eth_dma_stop()
507 clrbits_le32(base + PDMA_GLO_CFG, 0xffff0000); in mt7628_eth_start()

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