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Searched refs:PG2 (Results 1 – 25 of 1809) sorted by relevance

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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-fixed-length-fp-extend-trunc.ll340 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
353 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
365 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
384 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].s
400 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].s
441 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
455 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].d
466 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
539 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
552 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-fp-to-int.ll344 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
357 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
369 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
631 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
656 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
732 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
757 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
1212 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
1237 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
1499 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-int-to-fp.ll343 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
356 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
368 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
630 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
655 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
731 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
756 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
1210 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
1235 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
1497 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-int-div.ll95 ; VBITS_EQ_256-NEXT: ptrue [[PG2:p[0-9]+]].s, vl8
121 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
138 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
162 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
188 ; VBITS_EQ_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
205 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].s, vl64
229 ; VBITS_EQ_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
348 ; VBITS_EQ_256-NEXT: ptrue [[PG2:p[0-9]+]].s, vl8
362 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
383 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
[all …]
H A Dsve-fixed-length-int-select.ll55 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].b
75 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].b
95 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].b
115 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].b
159 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].h
179 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].h
199 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].h
263 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
283 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
367 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-fp-select.ll55 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].h
75 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].h
95 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].h
115 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].h
159 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
179 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
199 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].s
219 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].s
263 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
283 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/
H A Dsve-fixed-length-fp-extend-trunc.ll340 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
353 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
365 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
384 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].s
400 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].s
441 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
455 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].d
466 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
539 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
552 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-fp-to-int.ll344 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
357 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
369 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
631 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
656 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
732 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
757 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
1212 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
1237 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
1499 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-int-to-fp.ll343 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
356 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
368 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
630 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
655 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
731 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
756 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
1210 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
1235 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
1497 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-int-div.ll95 ; VBITS_EQ_256-NEXT: ptrue [[PG2:p[0-9]+]].s, vl8
121 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
138 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
162 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
188 ; VBITS_EQ_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
205 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].s, vl64
229 ; VBITS_EQ_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
348 ; VBITS_EQ_256-NEXT: ptrue [[PG2:p[0-9]+]].s, vl8
362 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
383 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
[all …]
H A Dsve-fixed-length-int-select.ll55 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].b
75 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].b
95 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].b
115 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].b
159 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].h
179 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].h
199 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].h
263 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
283 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
367 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-fixed-length-fp-extend-trunc.ll340 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
353 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
365 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
384 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].s
400 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].s
441 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
455 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].d
466 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
539 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
552 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-fp-to-int.ll344 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
357 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
369 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
631 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
656 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
732 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
757 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
1212 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
1237 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
1499 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-int-to-fp.ll343 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
356 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
368 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
630 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
655 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
731 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
756 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
1210 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
1235 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
1497 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-int-div.ll95 ; VBITS_EQ_256-NEXT: ptrue [[PG2:p[0-9]+]].s, vl8
121 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
138 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
162 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
188 ; VBITS_EQ_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
205 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].s, vl64
229 ; VBITS_EQ_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
348 ; VBITS_EQ_256-NEXT: ptrue [[PG2:p[0-9]+]].s, vl8
362 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
383 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
[all …]
H A Dsve-fixed-length-int-select.ll55 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].b
75 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].b
95 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].b
115 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].b
159 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].h
179 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].h
199 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].h
263 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
283 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
367 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-fixed-length-fp-extend-trunc.ll340 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
353 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
365 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
384 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].s
400 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].s
441 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
455 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].d
466 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
539 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
552 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-fp-to-int.ll344 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
357 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
369 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
631 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
656 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
732 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
757 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
1212 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
1237 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
1499 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-int-to-fp.ll343 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
356 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
368 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
630 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
655 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
731 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
756 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
1210 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
1235 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
1497 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-int-div.ll95 ; VBITS_EQ_256-NEXT: ptrue [[PG2:p[0-9]+]].s, vl8
121 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
138 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
162 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
188 ; VBITS_EQ_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
205 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].s, vl64
229 ; VBITS_EQ_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
348 ; VBITS_EQ_256-NEXT: ptrue [[PG2:p[0-9]+]].s, vl8
362 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
383 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
[all …]
H A Dsve-fixed-length-int-select.ll55 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].b
75 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].b
95 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].b
115 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].b
159 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].h
179 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].h
199 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].h
263 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
283 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
367 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Dsve-fixed-length-fp-to-int.ll343 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
356 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
368 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
628 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
653 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
729 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
754 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].d
1208 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
1233 ; VBITS_EQ_256-DAG: ptrue [[PG2:p[0-9]+]].s
1493 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
H A Dsve-fixed-length-int-div.ll93 ; VBITS_EQ_256-NEXT: ptrue [[PG2:p[0-9]+]].s, vl8
119 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
136 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
160 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
186 ; VBITS_EQ_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
203 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].s, vl64
227 ; VBITS_EQ_1024-NEXT: ptrue [[PG2:p[0-9]+]].s, vl32
347 ; VBITS_EQ_256-NEXT: ptrue [[PG2:p[0-9]+]].s, vl8
361 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
382 ; VBITS_EQ_512-NEXT: ptrue [[PG2:p[0-9]+]].s, vl16
[all …]
H A Dsve-fixed-length-int-select.ll53 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].b
73 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].b
93 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].b
113 ; VBITS_GE_2048-NEXT: ptrue [[PG2:p[0-9]+]].b
157 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].h
177 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].h
197 ; VBITS_GE_1024-NEXT: ptrue [[PG2:p[0-9]+]].h
261 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].s
281 ; VBITS_GE_512-NEXT: ptrue [[PG2:p[0-9]+]].s
365 ; CHECK-NEXT: ptrue [[PG2:p[0-9]+]].d
[all …]
/dports/www/elixir-phoenix_pubsub/phoenix_pubsub-1.0.2/test/phoenix/pubsub/
H A Dpg2_test.exs2 Application.put_env(:phoenix, :pubsub_test_adapter, Phoenix.PubSub.PG2)
9 alias Phoenix.PubSub.PG2
17 {:ok, _} = PG2.start_link(config.test, pool_size: size)
19 {:ok, _} = PG2.start_link(config.test, [])
21 {_, {:ok, _}} = start_pubsub(@node1, PG2, config.test, [pool_size: size * 2])
62 {:ok, pg2_supervisor} = PG2.start_link(:pool_size_count_test, [])

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