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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-fixed-length-fp-extend-trunc.ll356 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
357 ; VBITS_GE_512-NEXT: st1h { [[RES]].h }, [[PG3]], [x1]
366 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
387 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
403 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
487 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
504 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
555 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
565 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
587 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].s, vl16
[all …]
H A Dsve-fixed-length-trunc-stores.ll63 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl8
64 ; VBITS_EQ_256-NEXT: st1b { [[WORDS]].s }, [[PG3]], [x1]
138 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl8
139 ; VBITS_EQ_256-NEXT: st1w { [[WORDS]].s }, [[PG3]], [x1]
189 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl16
190 ; VBITS_EQ_256-NEXT: st1h { [[HALFS]].h }, [[PG3]], [x1]
214 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].b, vl32
215 ; VBITS_EQ_256-NEXT: st1b { [[BYTES]].b }, [[PG3]], [x1]
H A Dsve-fixed-length-fp-to-int.ll360 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
370 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
392 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
408 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
678 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
748 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
758 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
1228 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
1238 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
1616 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
[all …]
H A Dsve-fixed-length-int-to-fp.ll359 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
369 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
391 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
407 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
677 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
747 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
757 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
1226 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
1236 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
1614 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/
H A Dsve-fixed-length-fp-extend-trunc.ll356 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
357 ; VBITS_GE_512-NEXT: st1h { [[RES]].h }, [[PG3]], [x1]
366 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
387 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
403 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
487 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
504 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
555 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
565 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
587 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].s, vl16
[all …]
H A Dsve-fixed-length-trunc-stores.ll63 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl8
64 ; VBITS_EQ_256-NEXT: st1b { [[WORDS]].s }, [[PG3]], [x1]
138 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl8
139 ; VBITS_EQ_256-NEXT: st1w { [[WORDS]].s }, [[PG3]], [x1]
189 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl16
190 ; VBITS_EQ_256-NEXT: st1h { [[HALFS]].h }, [[PG3]], [x1]
214 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].b, vl32
215 ; VBITS_EQ_256-NEXT: st1b { [[BYTES]].b }, [[PG3]], [x1]
H A Dsve-fixed-length-fp-to-int.ll360 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
370 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
392 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
408 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
678 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
748 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
758 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
1228 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
1238 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
1616 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
[all …]
H A Dsve-fixed-length-int-to-fp.ll359 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
369 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
391 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
407 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
677 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
747 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
757 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
1226 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
1236 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
1614 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-fixed-length-fp-extend-trunc.ll356 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
357 ; VBITS_GE_512-NEXT: st1h { [[RES]].h }, [[PG3]], [x1]
366 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
387 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
403 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
487 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
504 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
555 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
565 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
587 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].s, vl16
[all …]
H A Dsve-fixed-length-trunc-stores.ll63 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl8
64 ; VBITS_EQ_256-NEXT: st1b { [[WORDS]].s }, [[PG3]], [x1]
138 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl8
139 ; VBITS_EQ_256-NEXT: st1w { [[WORDS]].s }, [[PG3]], [x1]
189 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl16
190 ; VBITS_EQ_256-NEXT: st1h { [[HALFS]].h }, [[PG3]], [x1]
214 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].b, vl32
215 ; VBITS_EQ_256-NEXT: st1b { [[BYTES]].b }, [[PG3]], [x1]
H A Dsve-fixed-length-fp-to-int.ll360 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
370 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
392 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
408 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
678 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
748 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
758 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
1228 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
1238 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
1616 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
[all …]
H A Dsve-fixed-length-int-to-fp.ll359 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
369 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
391 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
407 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
677 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
747 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
757 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
1226 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
1236 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
1614 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-fixed-length-fp-extend-trunc.ll356 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
357 ; VBITS_GE_512-NEXT: st1h { [[RES]].h }, [[PG3]], [x1]
366 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
387 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
403 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
487 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
504 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
555 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
565 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
587 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].s, vl16
[all …]
H A Dsve-fixed-length-trunc-stores.ll63 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl8
64 ; VBITS_EQ_256-NEXT: st1b { [[WORDS]].s }, [[PG3]], [x1]
138 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl8
139 ; VBITS_EQ_256-NEXT: st1w { [[WORDS]].s }, [[PG3]], [x1]
189 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl16
190 ; VBITS_EQ_256-NEXT: st1h { [[HALFS]].h }, [[PG3]], [x1]
214 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].b, vl32
215 ; VBITS_EQ_256-NEXT: st1b { [[BYTES]].b }, [[PG3]], [x1]
H A Dsve-fixed-length-fp-to-int.ll360 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
370 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
392 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
408 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
678 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
748 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
758 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
1228 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
1238 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
1616 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
[all …]
H A Dsve-fixed-length-int-to-fp.ll359 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
369 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
391 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
407 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
677 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
747 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
757 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
1226 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
1236 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
1614 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Dsve-fixed-length-trunc-stores.ll63 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl8
64 ; VBITS_EQ_256-NEXT: st1b { [[WORDS]].s }, [[PG3]], [x1]
138 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl8
139 ; VBITS_EQ_256-NEXT: st1w { [[WORDS]].s }, [[PG3]], [x1]
189 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl16
190 ; VBITS_EQ_256-NEXT: st1h { [[HALFS]].h }, [[PG3]], [x1]
214 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].b, vl32
215 ; VBITS_EQ_256-NEXT: st1b { [[BYTES]].b }, [[PG3]], [x1]
H A Dsve-fixed-length-fp-to-int.ll358 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
369 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
390 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl32
406 ; VBITS_GE_2048-NEXT: ptrue [[PG3:p[0-9]+]].h, vl64
673 ; VBITS_GE_1024-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
744 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
755 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].s, vl4
1223 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].h, vl16
1234 ; VBITS_EQ_256-DAG: ptrue [[PG3:p[0-9]+]].h, vl8
1609 ; VBITS_GE_512-NEXT: ptrue [[PG3:p[0-9]+]].s, vl8
[all …]
/dports/lang/micropython/micropython-1.17/ports/stm32/boards/STM32L476DISC/
H A Dpins.csv100 PG3,PG3
/dports/lang/micropython/micropython-1.17/ports/stm32/boards/LIMIFROG/
H A Dpins.csv100 PG3,PG3
/dports/lang/micropython/micropython-1.17/ports/stm32/boards/NUCLEO_F413ZH/
H A Dpins.csv100 PG3,PG3
/dports/lang/micropython/micropython-1.17/ports/stm32/boards/STM32F429DISC/
H A Dpins.csv113 PG3,PG3
/dports/lang/micropython/micropython-1.17/ports/stm32/boards/NUCLEO_F412ZG/
H A Dpins.csv100 PG3,PG3
/dports/devel/urjtag/urjtag-2021.03/data/analog/bf592/
H A Dbf59226 signal PG3
90 bit 21 I ? PG3
91 bit 22 O ? PG3 23 0 Z
/dports/lang/micropython/micropython-1.17/ports/stm32/boards/NUCLEO_F429ZI/
H A Dpins.csv113 PG3,PG3

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