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Searched refs:PHYPLL_PIXEL_RATE_CNTL (Results 1 – 6 of 6) sorted by relevance

/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.h63 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, inst)
74 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \
75 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1), \
76 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2), \
77 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 3), \
78 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 4), \
79 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 5)
91 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1),\
92 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2),\
95 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 5)
[all …]
H A Ddce_hwseq.c186 REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
200 if (REG(PHYPLL_PIXEL_RATE_CNTL[tg_inst])) in dce_crtc_switch_to_clk_src()
201 REG_UPDATE(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.h63 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, inst)
74 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \
75 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1), \
76 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2), \
77 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 3), \
78 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 4), \
79 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 5)
91 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1),\
92 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2),\
95 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 5)
[all …]
H A Ddce_hwseq.c186 REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
200 if (REG(PHYPLL_PIXEL_RATE_CNTL[tg_inst])) in dce_crtc_switch_to_clk_src()
201 REG_UPDATE(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_hwseq.h63 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, inst)
74 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 0), \
75 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1), \
76 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2), \
77 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 3), \
78 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 4), \
79 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 5)
91 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 1),\
92 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 2),\
95 SRII(PHYPLL_PIXEL_RATE_CNTL, blk, 5)
[all …]
H A Ddce_hwseq.c186 REG_UPDATE_2(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()
200 if (REG(PHYPLL_PIXEL_RATE_CNTL[tg_inst])) in dce_crtc_switch_to_clk_src()
201 REG_UPDATE(PHYPLL_PIXEL_RATE_CNTL[tg_inst], in dce_crtc_switch_to_clk_src()