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Searched refs:PLAT_MAX_RET_STATE (Results 1 – 25 of 365) sorted by relevance

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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/nxp/common/psci/
H A Dplat_psci.c151 if (cpu_state == PLAT_MAX_RET_STATE) { in _pwr_cpu_standby()
184 == PLAT_MAX_RET_STATE) { in _pwr_suspend()
206 PLAT_MAX_RET_STATE) { in _pwr_suspend()
227 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend()
259 == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
285 PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
309 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
352 PLAT_MAX_RET_STATE; in _pwr_state_validate()
360 PLAT_MAX_RET_STATE; in _pwr_state_validate()
368 PLAT_MAX_RET_STATE; in _pwr_state_validate()
[all …]
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/nxp/common/psci/
H A Dplat_psci.c151 if (cpu_state == PLAT_MAX_RET_STATE) { in _pwr_cpu_standby()
184 == PLAT_MAX_RET_STATE) { in _pwr_suspend()
206 PLAT_MAX_RET_STATE) { in _pwr_suspend()
227 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend()
259 == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
285 PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
309 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
352 PLAT_MAX_RET_STATE; in _pwr_state_validate()
360 PLAT_MAX_RET_STATE; in _pwr_state_validate()
368 PLAT_MAX_RET_STATE; in _pwr_state_validate()
[all …]
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/nxp/common/psci/
H A Dplat_psci.c151 if (cpu_state == PLAT_MAX_RET_STATE) { in _pwr_cpu_standby()
184 == PLAT_MAX_RET_STATE) { in _pwr_suspend()
206 PLAT_MAX_RET_STATE) { in _pwr_suspend()
227 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend()
259 == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
285 PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
309 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
352 PLAT_MAX_RET_STATE; in _pwr_state_validate()
360 PLAT_MAX_RET_STATE; in _pwr_state_validate()
368 PLAT_MAX_RET_STATE; in _pwr_state_validate()
[all …]
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/nxp/common/psci/
H A Dplat_psci.c151 if (cpu_state == PLAT_MAX_RET_STATE) { in _pwr_cpu_standby()
184 == PLAT_MAX_RET_STATE) { in _pwr_suspend()
206 PLAT_MAX_RET_STATE) { in _pwr_suspend()
227 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend()
259 == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
285 PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
309 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
352 PLAT_MAX_RET_STATE; in _pwr_state_validate()
360 PLAT_MAX_RET_STATE; in _pwr_state_validate()
368 PLAT_MAX_RET_STATE; in _pwr_state_validate()
[all …]
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/nxp/common/psci/
H A Dplat_psci.c151 if (cpu_state == PLAT_MAX_RET_STATE) { in _pwr_cpu_standby()
184 == PLAT_MAX_RET_STATE) { in _pwr_suspend()
206 PLAT_MAX_RET_STATE) { in _pwr_suspend()
227 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend()
259 == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
285 PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
309 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
352 PLAT_MAX_RET_STATE; in _pwr_state_validate()
360 PLAT_MAX_RET_STATE; in _pwr_state_validate()
368 PLAT_MAX_RET_STATE; in _pwr_state_validate()
[all …]
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/xilinx/versal/
H A Dplat_psci.c62 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend()
66 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in versal_pwr_domain_suspend()
74 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend()
103 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend_finish()
196 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal_validate_power_state()
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/xilinx/versal/
H A Dplat_psci.c62 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend()
66 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in versal_pwr_domain_suspend()
74 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend()
103 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend_finish()
196 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal_validate_power_state()
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/xilinx/versal/
H A Dplat_psci.c62 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend()
66 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in versal_pwr_domain_suspend()
74 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend()
103 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend_finish()
196 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal_validate_power_state()
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/xilinx/versal/
H A Dplat_psci.c62 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend()
66 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in versal_pwr_domain_suspend()
74 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend()
103 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend_finish()
196 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal_validate_power_state()
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/xilinx/versal/
H A Dplat_psci.c62 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend()
66 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in versal_pwr_domain_suspend()
74 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend()
103 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in versal_pwr_domain_suspend_finish()
196 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in versal_validate_power_state()
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/imx/imx8m/imx8mq/
H A Dimx8mq_psci.c30 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
31 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
36 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
105 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/imx/imx8m/imx8mq/
H A Dimx8mq_psci.c30 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
31 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
36 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
105 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/imx/imx8m/imx8mq/
H A Dimx8mq_psci.c30 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
31 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
36 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
105 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/imx/imx8m/imx8mq/
H A Dimx8mq_psci.c30 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
31 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
36 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
105 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/imx/imx8m/imx8mq/
H A Dimx8mq_psci.c30 CORE_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
31 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
36 CLUSTER_PWR_STATE(req_state) = PLAT_MAX_RET_STATE; in imx_validate_power_state()
105 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/xilinx/zynqmp/
H A Dplat_psci.c85 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in zynqmp_pwr_domain_suspend()
92 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend()
122 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend_finish()
171 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in zynqmp_validate_power_state()
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/xilinx/zynqmp/
H A Dplat_psci.c85 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in zynqmp_pwr_domain_suspend()
92 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend()
122 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend_finish()
171 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in zynqmp_validate_power_state()
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/xilinx/zynqmp/
H A Dplat_psci.c85 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in zynqmp_pwr_domain_suspend()
92 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend()
122 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend_finish()
171 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in zynqmp_validate_power_state()
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/xilinx/zynqmp/
H A Dplat_psci.c85 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in zynqmp_pwr_domain_suspend()
92 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend()
122 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend_finish()
171 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in zynqmp_validate_power_state()
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/xilinx/zynqmp/
H A Dplat_psci.c85 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? in zynqmp_pwr_domain_suspend()
92 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend()
122 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { in zynqmp_pwr_domain_suspend_finish()
171 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; in zynqmp_validate_power_state()
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/imx/common/
H A Dimx8_psci.c45 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_RET_STATE; in imx_validate_power_state()
60 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/imx/common/
H A Dimx8_psci.c45 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_RET_STATE; in imx_validate_power_state()
60 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/imx/common/
H A Dimx8_psci.c45 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_RET_STATE; in imx_validate_power_state()
60 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/imx/common/
H A Dimx8_psci.c45 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_RET_STATE; in imx_validate_power_state()
60 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/imx/common/
H A Dimx8_psci.c45 req_state->pwr_domain_state[MPIDR_AFFLVL1] = PLAT_MAX_RET_STATE; in imx_validate_power_state()
60 req_state->pwr_domain_state[PLAT_MAX_PWR_LVL] = PLAT_MAX_RET_STATE; in imx_get_sys_suspend_power_state()

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