| /dports/devel/openocd/openocd-0.11.0/tcl/board/ |
| H A D | imx53-m53evk.cfg | 110 set PLL4_BASE_ADDR [expr $AIPS2_BASE_ADDR + 0x0008C000]
145 setup_pll $PLL4_BASE_ADDR 455
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| H A D | imx53loco.cfg | 115 set PLL4_BASE_ADDR [expr $AIPS2_BASE_ADDR + 0x0008C000]
150 setup_pll $PLL4_BASE_ADDR 455
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| H A D | icnova_imx53_sodimm.cfg | 114 set PLL4_BASE_ADDR [expr $AIPS2_BASE_ADDR + 0x0008C000]
149 setup_pll $PLL4_BASE_ADDR 455
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
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| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
|