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/dports/editors/calligra/calligra-3.2.1/plugins/stencilsdocker/stencils/Circuit/
H A Dpmos_de.desktop2 Name=PMOS Transistor (European)
3 Name[bg]=Транзистор PMOS (европейски)
4 Name[bs]=PMOS tranzistor (europski)
5 Name[ca]=Transistor PMOS (europeu)
7 Name[da]=PMOS-transistor (europæisk)
9 Name[el]=PMOS Transistor (Ευρώπη)
12 Name[et]=PMOS transistor (Euroopa)
19 Name[ja]=PMOS トランジスタ (欧州)
21 Name[ko]=PMOS 트랜지스터(유럽식)
22 Name[nb]=PMOS-transistor (DIN)
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/regulator/
H A Dmax77826-regulator.c195 MAX77826_LDO(4, PMOS),
196 MAX77826_LDO(5, PMOS),
197 MAX77826_LDO(6, PMOS),
198 MAX77826_LDO(7, PMOS),
199 MAX77826_LDO(8, PMOS),
200 MAX77826_LDO(9, PMOS),
201 MAX77826_LDO(10, PMOS),
202 MAX77826_LDO(11, PMOS),
203 MAX77826_LDO(12, PMOS),
204 MAX77826_LDO(13, PMOS),
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/regulator/
H A Dmax77826-regulator.c195 MAX77826_LDO(4, PMOS),
196 MAX77826_LDO(5, PMOS),
197 MAX77826_LDO(6, PMOS),
198 MAX77826_LDO(7, PMOS),
199 MAX77826_LDO(8, PMOS),
200 MAX77826_LDO(9, PMOS),
201 MAX77826_LDO(10, PMOS),
202 MAX77826_LDO(11, PMOS),
203 MAX77826_LDO(12, PMOS),
204 MAX77826_LDO(13, PMOS),
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/regulator/
H A Dmax77826-regulator.c195 MAX77826_LDO(4, PMOS),
196 MAX77826_LDO(5, PMOS),
197 MAX77826_LDO(6, PMOS),
198 MAX77826_LDO(7, PMOS),
199 MAX77826_LDO(8, PMOS),
200 MAX77826_LDO(9, PMOS),
201 MAX77826_LDO(10, PMOS),
202 MAX77826_LDO(11, PMOS),
203 MAX77826_LDO(12, PMOS),
204 MAX77826_LDO(13, PMOS),
[all …]
/dports/editors/calligra/calligra-3.2.1/plugins/stencilsdocker/stencils/CMOS/
H A Dpmos_h.desktop7 Name[de]=PMOS-Transistor, waagerecht
11 Name[et]=Horisontaalne PMOS
15 Name[gl]=PMOS horizontal
30 Name[zh_CN]=水平 PMOS
H A Dpmos_v.desktop7 Name[de]=PMOS-Transistor, senkrecht
11 Name[et]=Vertikaalne PMOS
15 Name[gl]=PMOS vertical
30 Name[zh_CN]=垂直 PMOS
/dports/cad/jspice3/jspice3-2.5/examples/
H A Dmos6inv.cir56 **** LEVEL 1 PMOS ****
57 .MODEL P12L1 PMOS
76 **** LEVEL 3 PMOS ****
77 .MODEL P12L3 PMOS
96 **** LEVEL 6 PMOS ****
97 .MODEL P12L5 PMOS
/dports/cad/ngspice_rework/ngspice-35/tests/mos6/
H A Dmos6inv.cir57 **** LEVEL 1 PMOS ****
58 .MODEL P12L1 PMOS
77 **** LEVEL 3 PMOS ****
78 .MODEL P12L3 PMOS
97 **** LEVEL 6 PMOS ****
98 .MODEL P12L5 PMOS
H A Dsimpleinv.cir35 **** LEVEL 6 PMOS ****
36 .MODEL P12L5 PMOS
/dports/cad/gspiceui/gspiceui-v1.1.00/lib/models/
H A Ddmp10h400sk3.ckt4 M1 1 2 3 3 PMOS L = 1E-006 W = 1E-006
19 .MODEL PMOS PMOS LEVEL = 3 U0 = 400 VMAX = 1E+006 ETA = 4.441E-010
/dports/cad/cvc/cvc-1.1.0-4-gd172016/src/
H A DCvcMaps.cc47 {"MP", PMOS}, {"LDDP", LDDP},
62 {PMOS, "pmos"},
79 {PMOS, "M"},
H A DCConnectionCount.cc42 case PMOS: in CDeviceCount()
70 case PMOS: in CDeviceCount()
93 case PMOS: in CDeviceCount()
H A Dcvc.cc67 PMOS_ONLY[PMOS] = true; in main()
70 NMOS_PMOS[PMOS] = true; in main()
H A DCvcTypes.hh78 #define IsMos_(theDeviceType) ((theDeviceType) == NMOS || (theDeviceType) == PMOS || (theDeviceType…
80 #define IsPmos_(theDeviceType) ((theDeviceType) == PMOS || (theDeviceType) == LDDP)
123 enum modelType_t { NMOS = 0, PMOS, RESISTOR, CAPACITOR, DIODE, BIPOLAR, FUSE_ON, FUSE_OFF, enumerator
/dports/cad/irsim/irsim-9.7.110/lib/calibrate_hspice/
H A Dckt.hsp11 M1 out1 in1 VDD VDD PMOS L=P_LENU W=P_WITHU
16 M7 out2 out1 VDD VDD PMOS L=P_LENU W=P_WITHU
22 * out4 - Output of a PMOS pulling down to determine dynamic-low resistance.
24 M3 out4 in3 GND VDD PMOS L=P_LENU W=P_WITHU
H A DcktCap.hsp17 Madp adp Vdd Vdd Vdd PMOS L=3 W=1
23 Mpdp pdp Vdd Vdd Vdd PMOS L=3 W=1
/dports/math/scilab/scilab-6.1.1/scilab/modules/scicos_blocks/macros/Electrical/
H A DPMOS.sci22 function [x,y,typ]=PMOS(job,arg1,arg2)
34 msprintf(_("Set %s block parameters"), "PMOS Transistor"),..
66 model.sim="PMOS"
70 mo.model="PMOS";
/dports/cad/ngspice_rework/ngspice-35/examples/adms/ekv/
H A Dekv26_0u5.par6 * for the EKV v2.6 model is provided for NMOS and PMOS.
93 * EKV v2.6 PMOS
95 .MODEL PCH PMOS
/dports/cad/ngspice_rework/ngspice-35/examples/xspice/table/
H A Dtable-generator-b4-2d.sp7 * You have to select NMOS or PMOS by manually editing this file: currently
8 * PMOS is selected. For NMOS change '*' in column 1
23 *PMOS
H A Dtable-generator-b4-3d.sp7 * You have to select NMOS or PMOS by manually editing this file: currently
8 * NMOS is selected. For PMOS change '*' in column 1
26 *PMOS
/dports/cad/ngspice_rework/ngspice-35/examples/various/
H A Dnmos_pmos_BSIM330.sp1 *****Single NMOS and PMOS Transistor For BSIM3 threshold voltage check (Id-Vgs) (Id-Vds) ***
26 *.model p1 PMOS level=49 version=3.3.0
H A Dnmos_pmos_plotting.sp1 *****Single NMOS and PMOS Transistor For BSIM3 threshold voltage check (Id-Vgs) (Id-Vds) ***
26 *.model p1 PMOS level=49 version=3.3.0
/dports/cad/ngspice_rework/ngspice-35/tests/bsim3soidd/
H A Dpmosdd.mod1 *Model Card for BSIMDD2.0, floating body DD SOI PMOS
3 .Model P1 PMOS Level= 56
/dports/cad/ngspice_rework/ngspice-35/tests/bsim3soifd/
H A Dpmosfd.mod1 *Model Card for BSIMFD2.0, floating body FD SOI PMOS
3 .Model P1 PMOS Level= 55
/dports/cad/ngspice_rework/ngspice-35/examples/adms/bsimcmg/
H A Dmodelcard.pmos.11 ******** BSIM-MG 105 Sample Modelcard for PMOS ********
8 .model pmos1 PMOS level=17

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