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Searched refs:PMU_PWRDN_CON (Results 1 – 25 of 105) sorted by relevance

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/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/rockchip/common/drivers/pmu/
H A Dpmu_com.h56 val = mmio_read_32(PMU_BASE + PMU_PWRDN_CON); in pmu_power_domain_ctr()
62 mmio_write_32(PMU_BASE + PMU_PWRDN_CON, val); in pmu_power_domain_ctr()
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/rockchip/common/drivers/pmu/
H A Dpmu_com.h56 val = mmio_read_32(PMU_BASE + PMU_PWRDN_CON); in pmu_power_domain_ctr()
62 mmio_write_32(PMU_BASE + PMU_PWRDN_CON, val); in pmu_power_domain_ctr()
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/rockchip/common/drivers/pmu/
H A Dpmu_com.h56 val = mmio_read_32(PMU_BASE + PMU_PWRDN_CON); in pmu_power_domain_ctr()
62 mmio_write_32(PMU_BASE + PMU_PWRDN_CON, val); in pmu_power_domain_ctr()
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/rockchip/common/drivers/pmu/
H A Dpmu_com.h56 val = mmio_read_32(PMU_BASE + PMU_PWRDN_CON); in pmu_power_domain_ctr()
62 mmio_write_32(PMU_BASE + PMU_PWRDN_CON, val); in pmu_power_domain_ctr()
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/rockchip/common/drivers/pmu/
H A Dpmu_com.h56 val = mmio_read_32(PMU_BASE + PMU_PWRDN_CON); in pmu_power_domain_ctr()
62 mmio_write_32(PMU_BASE + PMU_PWRDN_CON, val); in pmu_power_domain_ctr()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-rockchip/px30/
H A Dpx30.c40 #define PMU_PWRDN_CON 0xff000018 macro
199 rk_clrreg(PMU_PWRDN_CON, 1 << 13); in arch_cpu_init()

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