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Searched refs:POSSIBLE_DELAY (Results 1 – 3 of 3) sorted by relevance

/dports/cad/iverilog/verilog-11.0/
H A Dnetlist.cc2754 DelayType result = POSSIBLE_DELAY; in combine_delays()
2781 DelayType result = POSSIBLE_DELAY; in delay_type_from_expr()
2819 case POSSIBLE_DELAY: in get_loop_delay_type()
3051 return POSSIBLE_DELAY; in delay_type()
H A Dnetlist.h2645 enum DelayType { NO_DELAY, ZERO_DELAY, POSSIBLE_DELAY, DEFINITE_DELAY }; enumerator
H A Delaborate.cc6406 } else if (dly_type == POSSIBLE_DELAY && warn_inf_loop) { in check_proc_delay()