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Searched refs:PREAMBLE2 (Results 1 – 3 of 3) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/control/
H A Dmdio_master.v34 PREAMBLE2 = 2, constant
243 state <= PREAMBLE2;
245 PREAMBLE2: begin
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/simple_gemac/
H A Dmdio.v47 PREAMBLE2 = 2, constant
301 state <= PREAMBLE2;
303 PREAMBLE2: begin
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/xge/rtl/verilog/
H A Dwishbone_if.v97 PREAMBLE2 = 2, constant
479 state <= PREAMBLE2;
481 PREAMBLE2: begin