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Searched refs:PS2CYCLES_ROUNDUP (Results 1 – 25 of 62) sorted by relevance

123

/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun9i.c377 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
378 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
379 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
380 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
391 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
397 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
406 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
408 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
418 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun9i.c377 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
378 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
379 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
380 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
391 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
397 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
406 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
408 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
418 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun9i.c377 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
378 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
379 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
380 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
391 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
397 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
406 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
408 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
418 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun9i.c377 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD);
378 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP);
379 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC);
380 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS);
391 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW);
397 PS2CYCLES_ROUNDUP(para->tZQoper.ps));
399 PS2CYCLES_ROUNDUP(para->tZQCS.ps));
406 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps));
408 PS2CYCLES_ROUNDUP(para->tXPDLL.ps));
418 PS2CYCLES_ROUNDUP(para->tCKSRE.ps));
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/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
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/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
[all …]
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-sunxi/
H A Ddram_sun9i.c379 const u32 tRCD = PS2CYCLES_ROUNDUP(para->tRCD); in mctl_channel_init()
380 const u32 tRP = PS2CYCLES_ROUNDUP(para->tRP); in mctl_channel_init()
381 const u32 tRC = PS2CYCLES_ROUNDUP(para->tRC); in mctl_channel_init()
382 const u32 tRAS = PS2CYCLES_ROUNDUP(para->tRAS); in mctl_channel_init()
393 const u32 tFAW = PS2CYCLES_ROUNDUP(para->tFAW); in mctl_channel_init()
399 PS2CYCLES_ROUNDUP(para->tZQoper.ps)); in mctl_channel_init()
401 PS2CYCLES_ROUNDUP(para->tZQCS.ps)); in mctl_channel_init()
408 const u32 tXP = MAX(para->tXP.ck, PS2CYCLES_ROUNDUP(para->tXP.ps)); in mctl_channel_init()
410 PS2CYCLES_ROUNDUP(para->tXPDLL.ps)); in mctl_channel_init()
420 PS2CYCLES_ROUNDUP(para->tCKSRE.ps)); in mctl_channel_init()
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