Home
last modified time | relevance | path

Searched refs:Page_Invalidate_T (Results 1 – 16 of 16) sorted by relevance

/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dcacheops.h64 #define Page_Invalidate_T 0x16 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dcacheops.h64 #define Page_Invalidate_T 0x16 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dcacheops.h64 #define Page_Invalidate_T 0x16 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dcacheops.h64 #define Page_Invalidate_T 0x16 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dcacheops.h64 #define Page_Invalidate_T 0x16 macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dcacheops.h64 #define Page_Invalidate_T 0x16 macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/mips/include/asm/
H A Dcacheops.h64 #define Page_Invalidate_T 0x16 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/include/asm/
H A Dcacheops.h83 #define Page_Invalidate_T (Cache_T | 0x14) macro
H A Dr4kcache.h188 cache_op(Page_Invalidate_T, addr); in invalidate_tcache_page()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/include/asm/
H A Dcacheops.h83 #define Page_Invalidate_T (Cache_T | 0x14) macro
H A Dr4kcache.h188 cache_op(Page_Invalidate_T, addr); in invalidate_tcache_page()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/include/asm/
H A Dcacheops.h83 #define Page_Invalidate_T (Cache_T | 0x14) macro
H A Dr4kcache.h188 cache_op(Page_Invalidate_T, addr); in invalidate_tcache_page()
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/mips/mm/
H A Dsc-rm7k.c99 cache_op(Page_Invalidate_T, start); in blast_rm7k_tcache()
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/mips/mm/
H A Dsc-rm7k.c99 cache_op(Page_Invalidate_T, start); in blast_rm7k_tcache()
/dports/multimedia/libv4l/linux-5.13-rc2/arch/mips/mm/
H A Dsc-rm7k.c99 cache_op(Page_Invalidate_T, start); in blast_rm7k_tcache()