| /dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 555 .addReg(PredReg); in UpdateBaseRegUses()
576 .addReg(PredReg); in UpdateBaseRegUses()
903 unsigned PredReg = 0; in MergeOpsUpdate() local
1208 MIPredReg != PredReg) in isIncrementOrDecrement()
1273 unsigned PredReg = 0; in MergeBaseUpdateLSMultiple() local
1327 .addImm(Pred).addReg(PredReg); in MergeBaseUpdateLSMultiple()
1415 unsigned PredReg = 0; in MergeBaseUpdateLoadStore() local
1528 unsigned PredReg; in MergeBaseUpdateLSDouble() local
1695 unsigned PredReg = 0; in FixInvalidRegPairOp() local
1795 unsigned PredReg = 0; in LoadStoreMultipleOpti() local
[all …]
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 555 .addReg(PredReg); in UpdateBaseRegUses()
576 .addReg(PredReg); in UpdateBaseRegUses()
903 unsigned PredReg = 0; in MergeOpsUpdate() local
1208 MIPredReg != PredReg) in isIncrementOrDecrement()
1273 unsigned PredReg = 0; in MergeBaseUpdateLSMultiple() local
1327 .addImm(Pred).addReg(PredReg); in MergeBaseUpdateLSMultiple()
1415 unsigned PredReg = 0; in MergeBaseUpdateLoadStore() local
1528 unsigned PredReg; in MergeBaseUpdateLSDouble() local
1695 unsigned PredReg = 0; in FixInvalidRegPairOp() local
1795 unsigned PredReg = 0; in LoadStoreMultipleOpti() local
[all …]
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| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 555 .addReg(PredReg); in UpdateBaseRegUses()
576 .addReg(PredReg); in UpdateBaseRegUses()
903 unsigned PredReg = 0; in MergeOpsUpdate() local
1208 MIPredReg != PredReg) in isIncrementOrDecrement()
1273 unsigned PredReg = 0; in MergeBaseUpdateLSMultiple() local
1327 .addImm(Pred).addReg(PredReg); in MergeBaseUpdateLSMultiple()
1415 unsigned PredReg = 0; in MergeBaseUpdateLoadStore() local
1528 unsigned PredReg; in MergeBaseUpdateLSDouble() local
1695 unsigned PredReg = 0; in FixInvalidRegPairOp() local
1795 unsigned PredReg = 0; in LoadStoreMultipleOpti() local
[all …]
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| /dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 555 .addReg(PredReg); in UpdateBaseRegUses()
576 .addReg(PredReg); in UpdateBaseRegUses()
898 unsigned PredReg = 0; in MergeOpsUpdate() local
1201 MIPredReg != PredReg) in isIncrementOrDecrement()
1266 unsigned PredReg = 0; in MergeBaseUpdateLSMultiple() local
1320 .addImm(Pred).addReg(PredReg); in MergeBaseUpdateLSMultiple()
1408 unsigned PredReg = 0; in MergeBaseUpdateLoadStore() local
1521 unsigned PredReg; in MergeBaseUpdateLSDouble() local
1688 unsigned PredReg = 0; in FixInvalidRegPairOp() local
1788 unsigned PredReg = 0; in LoadStoreMultipleOpti() local
[all …]
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| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 554 .addReg(PredReg); in UpdateBaseRegUses()
575 .addReg(PredReg); in UpdateBaseRegUses()
892 unsigned PredReg = 0; in MergeOpsUpdate() local
1194 MIPredReg != PredReg) in isIncrementOrDecrement()
1259 unsigned PredReg = 0; in MergeBaseUpdateLSMultiple() local
1313 .addImm(Pred).addReg(PredReg); in MergeBaseUpdateLSMultiple()
1401 unsigned PredReg = 0; in MergeBaseUpdateLoadStore() local
1508 unsigned PredReg; in MergeBaseUpdateLSDouble() local
1666 unsigned PredReg = 0; in FixInvalidRegPairOp() local
1761 unsigned PredReg = 0; in LoadStoreMultipleOpti() local
[all …]
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| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 554 .addReg(PredReg); in UpdateBaseRegUses()
575 .addReg(PredReg); in UpdateBaseRegUses()
892 unsigned PredReg = 0; in MergeOpsUpdate() local
1180 MIPredReg != PredReg) in isIncrementOrDecrement()
1245 unsigned PredReg = 0; in MergeBaseUpdateLSMultiple() local
1299 .addImm(Pred).addReg(PredReg); in MergeBaseUpdateLSMultiple()
1387 unsigned PredReg = 0; in MergeBaseUpdateLoadStore() local
1494 unsigned PredReg; in MergeBaseUpdateLSDouble() local
1652 unsigned PredReg = 0; in FixInvalidRegPairOp() local
1747 unsigned PredReg = 0; in LoadStoreMultipleOpti() local
[all …]
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| /dports/devel/py-keystone-engine/keystone-engine-0.9.1-3/src/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCChecker.cpp | 57 unsigned PredReg = Hexagon::NoRegister; in init() local
67 PredReg = R; in init()
72 NewPreds.insert(PredReg); in init()
111 Defs[R].insert(PredSense(PredReg, isTrue)); in init()
150 CurDefs.insert(*SRI), Defs[*SRI].insert(PredSense(PredReg, isTrue)); in init()
163 Defs[*SRI].insert(PredSense(PredReg, isTrue)); in init()
215 NewUses[N] = NewSense::Use(PredReg, HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI)); in init()
558 if (Use.IsNVJ && (Def.IsFloat || Def.PredReg != 0)) in hasValidNewValueDef()
562 if (Def.PredReg == 0) in hasValidNewValueDef()
567 if (Def.PredReg == Use.PredReg && Def.Cond == Use.Cond) in hasValidNewValueDef()
[all …]
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| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg); in UpdateBaseRegUses()
578 .addReg(PredReg); in UpdateBaseRegUses()
905 Register PredReg; in MergeOpsUpdate() local
1210 MIPredReg != PredReg) in isIncrementOrDecrement()
1275 Register PredReg; in MergeBaseUpdateLSMultiple() local
1449 Register PredReg; in MergeBaseUpdateLoadStore() local
1562 Register PredReg; in MergeBaseUpdateLSDouble() local
1729 Register PredReg; in FixInvalidRegPairOp() local
1829 Register PredReg; in LoadStoreMultipleOpti() local
2455 Register PredReg; in RescheduleLoadStoreInstrs() local
[all …]
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| H A D | Thumb2InstrInfo.h | 70 ARMCC::CondCodes getITInstrPredicate(const MachineInstr &MI, Register &PredReg);
76 Register &PredReg);
78 Register PredReg; in getVPTInstrPredicate() local
79 return getVPTInstrPredicate(MI, PredReg); in getVPTInstrPredicate()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg); in UpdateBaseRegUses()
578 .addReg(PredReg); in UpdateBaseRegUses()
905 Register PredReg; in MergeOpsUpdate() local
1210 MIPredReg != PredReg) in isIncrementOrDecrement()
1275 Register PredReg; in MergeBaseUpdateLSMultiple() local
1449 Register PredReg; in MergeBaseUpdateLoadStore() local
1562 Register PredReg; in MergeBaseUpdateLSDouble() local
1729 Register PredReg; in FixInvalidRegPairOp() local
1829 Register PredReg; in LoadStoreMultipleOpti() local
2455 Register PredReg; in RescheduleLoadStoreInstrs() local
[all …]
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| H A D | Thumb2InstrInfo.h | 70 ARMCC::CondCodes getITInstrPredicate(const MachineInstr &MI, Register &PredReg);
76 Register &PredReg);
78 Register PredReg; in getVPTInstrPredicate() local
79 return getVPTInstrPredicate(MI, PredReg); in getVPTInstrPredicate()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg); in UpdateBaseRegUses()
578 .addReg(PredReg); in UpdateBaseRegUses()
905 Register PredReg; in MergeOpsUpdate() local
1210 MIPredReg != PredReg) in isIncrementOrDecrement()
1275 Register PredReg; in MergeBaseUpdateLSMultiple() local
1467 Register PredReg; in MergeBaseUpdateLoadStore() local
1580 Register PredReg; in MergeBaseUpdateLSDouble() local
1747 Register PredReg; in FixInvalidRegPairOp() local
1847 Register PredReg; in LoadStoreMultipleOpti() local
2473 Register PredReg; in RescheduleLoadStoreInstrs() local
[all …]
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| H A D | Thumb2InstrInfo.h | 78 ARMCC::CondCodes getITInstrPredicate(const MachineInstr &MI, Register &PredReg);
84 Register &PredReg);
86 Register PredReg; in getVPTInstrPredicate() local
87 return getVPTInstrPredicate(MI, PredReg); in getVPTInstrPredicate()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg); in UpdateBaseRegUses()
578 .addReg(PredReg); in UpdateBaseRegUses()
905 Register PredReg; in MergeOpsUpdate() local
1210 MIPredReg != PredReg) in isIncrementOrDecrement()
1294 Register PredReg; in MergeBaseUpdateLSMultiple() local
1490 Register PredReg; in MergeBaseUpdateLoadStore() local
1628 Register PredReg; in MergeBaseUpdateLSDouble() local
1798 Register PredReg; in FixInvalidRegPairOp() local
1898 Register PredReg; in LoadStoreMultipleOpti() local
2524 Register PredReg; in RescheduleLoadStoreInstrs() local
[all …]
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| H A D | Thumb2InstrInfo.h | 78 ARMCC::CondCodes getITInstrPredicate(const MachineInstr &MI, Register &PredReg);
84 Register &PredReg);
86 Register PredReg; in getVPTInstrPredicate() local
87 return getVPTInstrPredicate(MI, PredReg); in getVPTInstrPredicate()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg); in UpdateBaseRegUses()
578 .addReg(PredReg); in UpdateBaseRegUses()
905 Register PredReg; in MergeOpsUpdate() local
1210 MIPredReg != PredReg) in isIncrementOrDecrement()
1294 Register PredReg; in MergeBaseUpdateLSMultiple() local
1490 Register PredReg; in MergeBaseUpdateLoadStore() local
1628 Register PredReg; in MergeBaseUpdateLSDouble() local
1798 Register PredReg; in FixInvalidRegPairOp() local
1898 Register PredReg; in LoadStoreMultipleOpti() local
2524 Register PredReg; in RescheduleLoadStoreInstrs() local
[all …]
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| H A D | Thumb2InstrInfo.h | 78 ARMCC::CondCodes getITInstrPredicate(const MachineInstr &MI, Register &PredReg);
84 Register &PredReg);
86 Register PredReg; in getVPTInstrPredicate() local
87 return getVPTInstrPredicate(MI, PredReg); in getVPTInstrPredicate()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg); in UpdateBaseRegUses()
578 .addReg(PredReg); in UpdateBaseRegUses()
905 Register PredReg; in MergeOpsUpdate() local
1210 MIPredReg != PredReg) in isIncrementOrDecrement()
1276 Register PredReg; in MergeBaseUpdateLSMultiple() local
1472 Register PredReg; in MergeBaseUpdateLoadStore() local
1606 Register PredReg; in MergeBaseUpdateLSDouble() local
1775 Register PredReg; in FixInvalidRegPairOp() local
1875 Register PredReg; in LoadStoreMultipleOpti() local
2501 Register PredReg; in RescheduleLoadStoreInstrs() local
[all …]
|
| H A D | Thumb2InstrInfo.h | 78 ARMCC::CondCodes getITInstrPredicate(const MachineInstr &MI, Register &PredReg);
84 Register &PredReg);
86 Register PredReg; in getVPTInstrPredicate() local
87 return getVPTInstrPredicate(MI, PredReg); in getVPTInstrPredicate()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg); in UpdateBaseRegUses()
578 .addReg(PredReg); in UpdateBaseRegUses()
905 Register PredReg; in MergeOpsUpdate() local
1210 MIPredReg != PredReg) in isIncrementOrDecrement()
1294 Register PredReg; in MergeBaseUpdateLSMultiple() local
1490 Register PredReg; in MergeBaseUpdateLoadStore() local
1628 Register PredReg; in MergeBaseUpdateLSDouble() local
1798 Register PredReg; in FixInvalidRegPairOp() local
1898 Register PredReg; in LoadStoreMultipleOpti() local
2524 Register PredReg; in RescheduleLoadStoreInstrs() local
[all …]
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| H A D | Thumb2InstrInfo.h | 78 ARMCC::CondCodes getITInstrPredicate(const MachineInstr &MI, Register &PredReg);
84 Register &PredReg);
86 Register PredReg; in getVPTInstrPredicate() local
87 return getVPTInstrPredicate(MI, PredReg); in getVPTInstrPredicate()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg); in UpdateBaseRegUses()
578 .addReg(PredReg); in UpdateBaseRegUses()
905 Register PredReg; in MergeOpsUpdate() local
1210 MIPredReg != PredReg) in isIncrementOrDecrement()
1294 Register PredReg; in MergeBaseUpdateLSMultiple() local
1490 Register PredReg; in MergeBaseUpdateLoadStore() local
1628 Register PredReg; in MergeBaseUpdateLSDouble() local
1798 Register PredReg; in FixInvalidRegPairOp() local
1898 Register PredReg; in LoadStoreMultipleOpti() local
2523 Register PredReg; in RescheduleLoadStoreInstrs() local
[all …]
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| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg); in UpdateBaseRegUses()
578 .addReg(PredReg); in UpdateBaseRegUses()
905 Register PredReg; in MergeOpsUpdate() local
1210 MIPredReg != PredReg) in isIncrementOrDecrement()
1294 Register PredReg; in MergeBaseUpdateLSMultiple() local
1490 Register PredReg; in MergeBaseUpdateLoadStore() local
1628 Register PredReg; in MergeBaseUpdateLSDouble() local
1798 Register PredReg; in FixInvalidRegPairOp() local
1898 Register PredReg; in LoadStoreMultipleOpti() local
2524 Register PredReg; in RescheduleLoadStoreInstrs() local
[all …]
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| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg); in UpdateBaseRegUses()
578 .addReg(PredReg); in UpdateBaseRegUses()
905 Register PredReg; in MergeOpsUpdate() local
1210 MIPredReg != PredReg) in isIncrementOrDecrement()
1276 Register PredReg; in MergeBaseUpdateLSMultiple() local
1472 Register PredReg; in MergeBaseUpdateLoadStore() local
1606 Register PredReg; in MergeBaseUpdateLSDouble() local
1775 Register PredReg; in FixInvalidRegPairOp() local
1875 Register PredReg; in LoadStoreMultipleOpti() local
2501 Register PredReg; in RescheduleLoadStoreInstrs() local
[all …]
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| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 557 .addReg(PredReg);
578 .addReg(PredReg);
905 Register PredReg;
1210 MIPredReg != PredReg)
1294 Register PredReg;
1490 Register PredReg;
1628 Register PredReg;
1798 Register PredReg;
1898 Register PredReg;
2524 Register PredReg;
[all …]
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