/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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/dports/sysutils/u-boot-pine64/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | fsl_icid.h | 161 QDMA_BASE_ADDR + QMAN_CQSIDR_REG, \ 162 QDMA_BASE_ADDR, QDMA_IS_LE), \ 164 QDMA_BASE_ADDR + QMAN_CQSIDR_REG + 4, \ 165 QDMA_BASE_ADDR, QDMA_IS_LE)
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