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Searched refs:R15PCBITS (Results 1 – 12 of 12) sorted by relevance

/dports/devel/avr-gdb/gdb-7.3.1/sim/arm/
H A Darmemu.h127 #define R15PCBITS (0x03ffffffL) macro
129 #define R15PCBITS (0x03fffffcL) macro
139 #define PCMASK R15PCBITS
140 #define PCWRAP(pc) ((pc) & R15PCBITS)
146 #define R15INTPC (state->Reg[15] & (R15INTBITS | R15PCBITS))
147 #define R15INTPCMODE (state->Reg[15] & (R15INTBITS | R15PCBITS | R15MODEBITS))
149 #define R15PC (state->Reg[15] & R15PCBITS)
150 #define R15PCMODE (state->Reg[15] & (R15PCBITS | R15MODEBITS))
H A Darmsupp.c76 return (state->Reg[15] + isize) & R15PCBITS; in ARMul_GetNextPC()
87 state->Reg[15] = R15CCINTMODE | (value & R15PCBITS); in ARMul_SetPC()
H A Darmemu.c556 pc = pc & R15PCBITS; in ARMul_Emulate32()
570 pc = pc & R15PCBITS; in ARMul_Emulate32()
3784 ((state->Reg[15] + isize) & R15PCBITS)); in ARMul_Emulate32()
4144 state->Reg[15] = (src & R15PCBITS) | ECC | ER15INT | EMODE; in WriteR15()
4179 state->Reg[15] = (src & (CCBITS | R15PCBITS)) | ER15INT | EMODE; in WriteSR15()
/dports/devel/gdb761/gdb-7.6.1/sim/arm/
H A Darmemu.h126 #define R15PCBITS (0x03ffffffL) macro
128 #define R15PCBITS (0x03fffffcL) macro
138 #define PCMASK R15PCBITS
139 #define PCWRAP(pc) ((pc) & R15PCBITS)
145 #define R15INTPC (state->Reg[15] & (R15INTBITS | R15PCBITS))
146 #define R15INTPCMODE (state->Reg[15] & (R15INTBITS | R15PCBITS | R15MODEBITS))
148 #define R15PC (state->Reg[15] & R15PCBITS)
149 #define R15PCMODE (state->Reg[15] & (R15PCBITS | R15MODEBITS))
H A Darmsupp.c75 return (state->Reg[15] + isize) & R15PCBITS; in ARMul_GetNextPC()
86 state->Reg[15] = R15CCINTMODE | (value & R15PCBITS); in ARMul_SetPC()
H A Darmemu.c555 pc = pc & R15PCBITS; in ARMul_Emulate32()
569 pc = pc & R15PCBITS; in ARMul_Emulate32()
3783 ((state->Reg[15] + isize) & R15PCBITS)); in ARMul_Emulate32()
4143 state->Reg[15] = (src & R15PCBITS) | ECC | ER15INT | EMODE; in WriteR15()
4178 state->Reg[15] = (src & (CCBITS | R15PCBITS)) | ER15INT | EMODE; in WriteSR15()
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/arm/
H A Darmemu.h127 #define R15PCBITS (0x03ffffffL) macro
129 #define R15PCBITS (0x03fffffcL) macro
139 #define PCMASK R15PCBITS
140 #define PCWRAP(pc) ((pc) & R15PCBITS)
146 #define R15INTPC (state->Reg[15] & (R15INTBITS | R15PCBITS))
147 #define R15INTPCMODE (state->Reg[15] & (R15INTBITS | R15PCBITS | R15MODEBITS))
149 #define R15PC (state->Reg[15] & R15PCBITS)
150 #define R15PCMODE (state->Reg[15] & (R15PCBITS | R15MODEBITS))
H A Darmsupp.c76 return (state->Reg[15] + isize) & R15PCBITS; in ARMul_GetNextPC()
87 state->Reg[15] = R15CCINTMODE | (value & R15PCBITS); in ARMul_SetPC()
H A Darmemu.c351 pc = pc & R15PCBITS; in ARMul_Emulate32()
365 pc = pc & R15PCBITS; in ARMul_Emulate32()
3489 ((state->Reg[15] + isize) & R15PCBITS)); in ARMul_Emulate32()
3849 state->Reg[15] = (src & R15PCBITS) | ECC | ER15INT | EMODE; in WriteR15()
3884 state->Reg[15] = (src & (CCBITS | R15PCBITS)) | ER15INT | EMODE; in WriteSR15()
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/arm/
H A Darmemu.h127 #define R15PCBITS (0x03ffffffL) macro
129 #define R15PCBITS (0x03fffffcL) macro
139 #define PCMASK R15PCBITS
140 #define PCWRAP(pc) ((pc) & R15PCBITS)
146 #define R15INTPC (state->Reg[15] & (R15INTBITS | R15PCBITS))
147 #define R15INTPCMODE (state->Reg[15] & (R15INTBITS | R15PCBITS | R15MODEBITS))
149 #define R15PC (state->Reg[15] & R15PCBITS)
150 #define R15PCMODE (state->Reg[15] & (R15PCBITS | R15MODEBITS))
H A Darmsupp.c76 return (state->Reg[15] + isize) & R15PCBITS; in ARMul_GetNextPC()
87 state->Reg[15] = R15CCINTMODE | (value & R15PCBITS); in ARMul_SetPC()
H A Darmemu.c351 pc = pc & R15PCBITS; in ARMul_Emulate32()
365 pc = pc & R15PCBITS; in ARMul_Emulate32()
3489 ((state->Reg[15] + isize) & R15PCBITS)); in ARMul_Emulate32()
3849 state->Reg[15] = (src & R15PCBITS) | ECC | ER15INT | EMODE; in WriteR15()
3884 state->Reg[15] = (src & (CCBITS | R15PCBITS)) | ER15INT | EMODE; in WriteSR15()