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Searched refs:RCAR_I2C_ICFBSCR_TCYC17 (Results 1 – 25 of 57) sorted by relevance

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/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-chip/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()
/dports/sysutils/u-boot-pine64/u-boot-2021.07/drivers/i2c/
H A Drcar_i2c.c56 #define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */ macro
314 writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR); in rcar_i2c_set_speed()

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