RCC_CFGR_RTCPRE_0 (reference) in projects: dports

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Searched refs:RCC_CFGR_RTCPRE_0 (Results 1 – 5 of 5) sorted by relevance

/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/inc/
H A D	stm32h7xx_ll_rcc.h	388 #define LL_RCC_RTC_HSE_DIV_3 (uint32_t)(RCC_CFGR_RTCPRE_1\|RCC_CFGR_RTCPRE_0) 390 #define LL_RCC_RTC_HSE_DIV_5 (uint32_t)(RCC_CFGR_RTCPRE_2\|RCC_CFGR_RTCPRE_0) 392 …_RCC_RTC_HSE_DIV_7 (uint32_t)(RCC_CFGR_RTCPRE_2\|RCC_CFGR_RTCPRE_1\|RCC_CFGR_RTCPRE_0) 394 #define LL_RCC_RTC_HSE_DIV_9 (uint32_t)(RCC_CFGR_RTCPRE_3\|RCC_CFGR_RTCPRE_0) 396 …_RCC_RTC_HSE_DIV_11 (uint32_t)(RCC_CFGR_RTCPRE_3\|RCC_CFGR_RTCPRE_1\|RCC_CFGR_RTCPRE_0) 398 …_RCC_RTC_HSE_DIV_13 (uint32_t)(RCC_CFGR_RTCPRE_3\|RCC_CFGR_RTCPRE_2\|RCC_CFGR_RTCPRE_0) 402 #define LL_RCC_RTC_HSE_DIV_17 (uint32_t)(RCC_CFGR_RTCPRE_4\|RCC_CFGR_RTCPRE_0) 404 …_RCC_RTC_HSE_DIV_19 (uint32_t)(RCC_CFGR_RTCPRE_4\|RCC_CFGR_RTCPRE_1\|RCC_CFGR_RTCPRE_0) 406 …_RCC_RTC_HSE_DIV_21 (uint32_t)(RCC_CFGR_RTCPRE_4\|RCC_CFGR_RTCPRE_2\|RCC_CFGR_RTCPRE_0) 410 …_RCC_RTC_HSE_DIV_25 (uint32_t)(RCC_CFGR_RTCPRE_4\|RCC_CFGR_RTCPRE_3\|RCC_CFGR_RTCPRE_0) [all …]
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A D	stm32f4xx.h	`8704 #define RCC_CFGR_RTCPRE_0 ((uint32_t)0x00010000) macro`
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A D	stm32f4xx.h	`8704 #define RCC_CFGR_RTCPRE_0 ((uint32_t)0x00010000) macro`
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_h7xx/
H A D	stm32h753xx.h	`14612 #define RCC_CFGR_RTCPRE_0 (0x1UL << RCC_CFGR_RTCPRE_Pos) /*!< 0x0000010… macro`
H A D	stm32h743xx.h	`14343 #define RCC_CFGR_RTCPRE_0 (0x1UL << RCC_CFGR_RTCPRE_Pos) /*!< 0x0000010… macro`