/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn301/ |
H A D | dcn301_dccg.h | 37 SR(REFCLK_CNTL) 50 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\ 51 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh)
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn301/ |
H A D | dcn301_dccg.h | 37 SR(REFCLK_CNTL) 50 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\ 51 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh)
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn301/ |
H A D | dcn301_dccg.h | 37 SR(REFCLK_CNTL) 50 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\ 51 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh)
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_dccg.h | 37 SR(REFCLK_CNTL) 61 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\ 62 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh) 100 uint32_t REFCLK_CNTL; member
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H A D | dcn20_dccg.c | 85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
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H A D | dcn20_hwseq.c | 2449 if (REG(REFCLK_CNTL)) in dcn20_fpga_init_hw() 2450 REG_WRITE(REFCLK_CNTL, 0); in dcn20_fpga_init_hw()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_dccg.h | 37 SR(REFCLK_CNTL) 61 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\ 62 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh) 100 uint32_t REFCLK_CNTL; member
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H A D | dcn20_dccg.c | 85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
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H A D | dcn20_hwseq.c | 2449 if (REG(REFCLK_CNTL)) in dcn20_fpga_init_hw() 2450 REG_WRITE(REFCLK_CNTL, 0); in dcn20_fpga_init_hw()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_dccg.h | 37 SR(REFCLK_CNTL) 61 DCCG_SF(REFCLK_CNTL, REFCLK_CLOCK_EN, mask_sh),\ 62 DCCG_SF(REFCLK_CNTL, REFCLK_SRC_SEL, mask_sh) 100 uint32_t REFCLK_CNTL; member
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H A D | dcn20_dccg.c | 85 REG_GET_2(REFCLK_CNTL, REFCLK_CLOCK_EN, &clk_en, REFCLK_SRC_SEL, &clk_sel); in dccg2_get_dccg_ref_freq()
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H A D | dcn20_hwseq.c | 2449 if (REG(REFCLK_CNTL)) in dcn20_fpga_init_hw() 2450 REG_WRITE(REFCLK_CNTL, 0); in dcn20_fpga_init_hw()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_hwseq.h | 164 SR(REFCLK_CNTL), \ 362 SR(REFCLK_CNTL), \ 513 uint32_t REFCLK_CNTL; member
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_hwseq.h | 164 SR(REFCLK_CNTL), \ 362 SR(REFCLK_CNTL), \ 513 uint32_t REFCLK_CNTL; member
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_hwseq.h | 164 SR(REFCLK_CNTL), \ 362 SR(REFCLK_CNTL), \ 513 uint32_t REFCLK_CNTL; member
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_hwseq.c | 441 REG_WRITE(REFCLK_CNTL, 0); in dcn30_init_hw()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_hwseq.c | 441 REG_WRITE(REFCLK_CNTL, 0); in dcn30_init_hw()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_hwseq.c | 441 REG_WRITE(REFCLK_CNTL, 0); in dcn30_init_hw()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_hw_sequencer.c | 1286 REG_WRITE(REFCLK_CNTL, 0); in dcn10_init_hw()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_hw_sequencer.c | 1286 REG_WRITE(REFCLK_CNTL, 0); in dcn10_init_hw()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_hw_sequencer.c | 1286 REG_WRITE(REFCLK_CNTL, 0); in dcn10_init_hw()
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