Home
last modified time | relevance | path

Searched refs:REG_CONTROL (Results 1 – 25 of 97) sorted by relevance

1234

/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Dnios2-opc.c83 {"cpuid", 5, REG_CONTROL},
84 {"ctl6", 6, REG_CONTROL},
112 {"ctl0", 0, REG_CONTROL},
113 {"ctl1", 1, REG_CONTROL},
114 {"ctl2", 2, REG_CONTROL},
115 {"ctl3", 3, REG_CONTROL},
116 {"ctl4", 4, REG_CONTROL},
117 {"ctl5", 5, REG_CONTROL},
118 {"ctl7", 7, REG_CONTROL},
119 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/
H A Dnios2-opc.c83 {"cpuid", 5, REG_CONTROL},
84 {"ctl6", 6, REG_CONTROL},
112 {"ctl0", 0, REG_CONTROL},
113 {"ctl1", 1, REG_CONTROL},
114 {"ctl2", 2, REG_CONTROL},
115 {"ctl3", 3, REG_CONTROL},
116 {"ctl4", 4, REG_CONTROL},
117 {"ctl5", 5, REG_CONTROL},
118 {"ctl7", 7, REG_CONTROL},
119 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Dnios2-opc.c83 {"cpuid", 5, REG_CONTROL},
84 {"ctl6", 6, REG_CONTROL},
112 {"ctl0", 0, REG_CONTROL},
113 {"ctl1", 1, REG_CONTROL},
114 {"ctl2", 2, REG_CONTROL},
115 {"ctl3", 3, REG_CONTROL},
116 {"ctl4", 4, REG_CONTROL},
117 {"ctl5", 5, REG_CONTROL},
118 {"ctl7", 7, REG_CONTROL},
119 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/devel/gdb/gdb-11.1/opcodes/
H A Dnios2-opc.c83 {"cpuid", 5, REG_CONTROL},
84 {"ctl6", 6, REG_CONTROL},
112 {"ctl0", 0, REG_CONTROL},
113 {"ctl1", 1, REG_CONTROL},
114 {"ctl2", 2, REG_CONTROL},
115 {"ctl3", 3, REG_CONTROL},
116 {"ctl4", 4, REG_CONTROL},
117 {"ctl5", 5, REG_CONTROL},
118 {"ctl7", 7, REG_CONTROL},
119 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/devel/gnulibiberty/binutils-2.37/opcodes/
H A Dnios2-opc.c83 {"cpuid", 5, REG_CONTROL},
84 {"ctl6", 6, REG_CONTROL},
112 {"ctl0", 0, REG_CONTROL},
113 {"ctl1", 1, REG_CONTROL},
114 {"ctl2", 2, REG_CONTROL},
115 {"ctl3", 3, REG_CONTROL},
116 {"ctl4", 4, REG_CONTROL},
117 {"ctl5", 5, REG_CONTROL},
118 {"ctl7", 7, REG_CONTROL},
119 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/devel/binutils/binutils-2.37/opcodes/
H A Dnios2-opc.c83 {"cpuid", 5, REG_CONTROL},
84 {"ctl6", 6, REG_CONTROL},
112 {"ctl0", 0, REG_CONTROL},
113 {"ctl1", 1, REG_CONTROL},
114 {"ctl2", 2, REG_CONTROL},
115 {"ctl3", 3, REG_CONTROL},
116 {"ctl4", 4, REG_CONTROL},
117 {"ctl5", 5, REG_CONTROL},
118 {"ctl7", 7, REG_CONTROL},
119 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/bluetooth/
H A Dbluecard_cs.c126 #define REG_CONTROL 0x22 macro
266 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
309 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
313 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
513 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_interrupt()
547 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_interrupt()
727 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
740 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
745 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
750 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/bluetooth/
H A Dbluecard_cs.c126 #define REG_CONTROL 0x22 macro
266 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
309 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
313 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
513 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_interrupt()
547 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_interrupt()
727 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
740 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
745 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
750 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
[all …]
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/bluetooth/
H A Dbluecard_cs.c126 #define REG_CONTROL 0x22 macro
266 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
309 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
313 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
513 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_interrupt()
547 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_interrupt()
727 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
740 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
745 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
750 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_open()
[all …]
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dnios2.c1817 {"cpuid", 5, REG_CONTROL},
1818 {"ctl6", 6, REG_CONTROL},
1846 {"ctl0", 0, REG_CONTROL},
1847 {"ctl1", 1, REG_CONTROL},
1848 {"ctl2", 2, REG_CONTROL},
1849 {"ctl3", 3, REG_CONTROL},
1850 {"ctl4", 4, REG_CONTROL},
1851 {"ctl5", 5, REG_CONTROL},
1852 {"ctl7", 7, REG_CONTROL},
1853 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dnios2.c1817 {"cpuid", 5, REG_CONTROL},
1818 {"ctl6", 6, REG_CONTROL},
1846 {"ctl0", 0, REG_CONTROL},
1847 {"ctl1", 1, REG_CONTROL},
1848 {"ctl2", 2, REG_CONTROL},
1849 {"ctl3", 3, REG_CONTROL},
1850 {"ctl4", 4, REG_CONTROL},
1851 {"ctl5", 5, REG_CONTROL},
1852 {"ctl7", 7, REG_CONTROL},
1853 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dnios2.c1817 {"cpuid", 5, REG_CONTROL},
1818 {"ctl6", 6, REG_CONTROL},
1846 {"ctl0", 0, REG_CONTROL},
1847 {"ctl1", 1, REG_CONTROL},
1848 {"ctl2", 2, REG_CONTROL},
1849 {"ctl3", 3, REG_CONTROL},
1850 {"ctl4", 4, REG_CONTROL},
1851 {"ctl5", 5, REG_CONTROL},
1852 {"ctl7", 7, REG_CONTROL},
1853 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dnios2.c1817 {"cpuid", 5, REG_CONTROL},
1818 {"ctl6", 6, REG_CONTROL},
1846 {"ctl0", 0, REG_CONTROL},
1847 {"ctl1", 1, REG_CONTROL},
1848 {"ctl2", 2, REG_CONTROL},
1849 {"ctl3", 3, REG_CONTROL},
1850 {"ctl4", 4, REG_CONTROL},
1851 {"ctl5", 5, REG_CONTROL},
1852 {"ctl7", 7, REG_CONTROL},
1853 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Dnios2.c1817 {"cpuid", 5, REG_CONTROL},
1818 {"ctl6", 6, REG_CONTROL},
1846 {"ctl0", 0, REG_CONTROL},
1847 {"ctl1", 1, REG_CONTROL},
1848 {"ctl2", 2, REG_CONTROL},
1849 {"ctl3", 3, REG_CONTROL},
1850 {"ctl4", 4, REG_CONTROL},
1851 {"ctl5", 5, REG_CONTROL},
1852 {"ctl7", 7, REG_CONTROL},
1853 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Dnios2.c1817 {"cpuid", 5, REG_CONTROL},
1818 {"ctl6", 6, REG_CONTROL},
1846 {"ctl0", 0, REG_CONTROL},
1847 {"ctl1", 1, REG_CONTROL},
1848 {"ctl2", 2, REG_CONTROL},
1849 {"ctl3", 3, REG_CONTROL},
1850 {"ctl4", 4, REG_CONTROL},
1851 {"ctl5", 5, REG_CONTROL},
1852 {"ctl7", 7, REG_CONTROL},
1853 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/
H A Dnios2.c1817 {"cpuid", 5, REG_CONTROL},
1818 {"ctl6", 6, REG_CONTROL},
1846 {"ctl0", 0, REG_CONTROL},
1847 {"ctl1", 1, REG_CONTROL},
1848 {"ctl2", 2, REG_CONTROL},
1849 {"ctl3", 3, REG_CONTROL},
1850 {"ctl4", 4, REG_CONTROL},
1851 {"ctl5", 5, REG_CONTROL},
1852 {"ctl7", 7, REG_CONTROL},
1853 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/
H A Dnios2.c1817 {"cpuid", 5, REG_CONTROL},
1818 {"ctl6", 6, REG_CONTROL},
1846 {"ctl0", 0, REG_CONTROL},
1847 {"ctl1", 1, REG_CONTROL},
1848 {"ctl2", 2, REG_CONTROL},
1849 {"ctl3", 3, REG_CONTROL},
1850 {"ctl4", 4, REG_CONTROL},
1851 {"ctl5", 5, REG_CONTROL},
1852 {"ctl7", 7, REG_CONTROL},
1853 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/
H A Dnios2.c1817 {"cpuid", 5, REG_CONTROL},
1818 {"ctl6", 6, REG_CONTROL},
1846 {"ctl0", 0, REG_CONTROL},
1847 {"ctl1", 1, REG_CONTROL},
1848 {"ctl2", 2, REG_CONTROL},
1849 {"ctl3", 3, REG_CONTROL},
1850 {"ctl4", 4, REG_CONTROL},
1851 {"ctl5", 5, REG_CONTROL},
1852 {"ctl7", 7, REG_CONTROL},
1853 {"ctl8", 8, REG_CONTROL},
[all …]
/dports/games/libretro-mame2000/mame2000-libretro-e364a15/src/cpu/tms34010/
H A D34010ops.h55 REG_CONTROL, enumerator
87 #define PBH (IOREG(REG_CONTROL) & 0x0100)
88 #define PBV (IOREG(REG_CONTROL) & 0x0200)
H A D34010gfx.c914 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_b_l()
926 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_b_xy()
938 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_l_l()
939 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_l_l()
954 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_l_xy()
955 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_l_xy()
970 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_xy_l()
971 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_xy_l()
987 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_xy_xy()
1078 yreverse = (IOREG(REG_CONTROL) >> 9) & 1; in FUNCTION_NAME()
[all …]
/dports/games/libretro-mame2003_plus/mame2003-plus-libretro-17e9889/src/cpu/tms34010/
H A D34010gfx.c907 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_b_l()
919 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_b_xy()
931 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_l_l()
932 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_l_l()
947 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_l_xy()
948 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_l_xy()
963 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_xy_l()
964 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_xy_l()
980 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_xy_xy()
1077 yreverse = (IOREG(REG_CONTROL) >> 9) & 1; in FUNCTION_NAME()
[all …]
/dports/games/libretro-mame2003/mame2003-libretro-4358db4/src/cpu/tms34010/
H A D34010gfx.c915 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_b_l()
927 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_b_xy()
939 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_l_l()
940 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_l_l()
955 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_l_xy()
956 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_l_xy()
971 int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; in pixblt_xy_l()
972 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_xy_l()
988 int pbh = (IOREG(REG_CONTROL) >> 8) & 1; in pixblt_xy_xy()
1085 yreverse = (IOREG(REG_CONTROL) >> 9) & 1; in FUNCTION_NAME()
[all …]
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/i825xx/
H A Dether1.c301 writeb(CTRL_RST|CTRL_ACK, REG_CONTROL); in ether1_reset()
450 writeb(CTRL_RST|CTRL_ACK, REG_CONTROL); in ether1_init_for_open()
509 writeb(CTRL_RST, REG_CONTROL); in ether1_init_for_open()
510 writeb(0, REG_CONTROL); in ether1_init_for_open()
511 writeb(CTRL_CA, REG_CONTROL); in ether1_init_for_open()
759 writeb(CTRL_CA, REG_CONTROL); in ether1_xmit_done()
905 writeb(CTRL_CA | CTRL_ACK, REG_CONTROL); in ether1_interrupt()
917 writeb(CTRL_CA, REG_CONTROL); in ether1_interrupt()
929 writeb(CTRL_CA, REG_CONTROL); in ether1_interrupt()
938 writeb(CTRL_ACK, REG_CONTROL); in ether1_interrupt()
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/i825xx/
H A Dether1.c301 writeb(CTRL_RST|CTRL_ACK, REG_CONTROL); in ether1_reset()
450 writeb(CTRL_RST|CTRL_ACK, REG_CONTROL); in ether1_init_for_open()
509 writeb(CTRL_RST, REG_CONTROL); in ether1_init_for_open()
510 writeb(0, REG_CONTROL); in ether1_init_for_open()
511 writeb(CTRL_CA, REG_CONTROL); in ether1_init_for_open()
759 writeb(CTRL_CA, REG_CONTROL); in ether1_xmit_done()
905 writeb(CTRL_CA | CTRL_ACK, REG_CONTROL); in ether1_interrupt()
917 writeb(CTRL_CA, REG_CONTROL); in ether1_interrupt()
929 writeb(CTRL_CA, REG_CONTROL); in ether1_interrupt()
938 writeb(CTRL_ACK, REG_CONTROL); in ether1_interrupt()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/i825xx/
H A Dether1.c301 writeb(CTRL_RST|CTRL_ACK, REG_CONTROL); in ether1_reset()
450 writeb(CTRL_RST|CTRL_ACK, REG_CONTROL); in ether1_init_for_open()
509 writeb(CTRL_RST, REG_CONTROL); in ether1_init_for_open()
510 writeb(0, REG_CONTROL); in ether1_init_for_open()
511 writeb(CTRL_CA, REG_CONTROL); in ether1_init_for_open()
759 writeb(CTRL_CA, REG_CONTROL); in ether1_xmit_done()
905 writeb(CTRL_CA | CTRL_ACK, REG_CONTROL); in ether1_interrupt()
917 writeb(CTRL_CA, REG_CONTROL); in ether1_interrupt()
929 writeb(CTRL_CA, REG_CONTROL); in ether1_interrupt()
938 writeb(CTRL_ACK, REG_CONTROL); in ether1_interrupt()

1234