| /dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7960 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
7962 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
7966 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7733 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
7735 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
7739 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 8897 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
8899 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
8903 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 8890 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
8892 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
8896 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 8897 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
8899 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
8903 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 8824 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
8826 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
8830 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9566 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9568 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9572 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9396 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9398 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9402 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9956 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9958 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9962 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9681 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9683 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9687 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9303 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9305 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9309 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9956 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9958 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9962 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9956 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9958 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9962 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9681 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9683 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9687 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9956 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9958 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9962 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9956 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9958 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9962 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|
| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9972 bool RHSIsAllZeros = ISD::isBuildVectorAllZeros(RHS.getNode()); in visitVSELECT() local
9974 if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) || in visitVSELECT()
9978 else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) && in visitVSELECT()
|