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Searched refs:RMTICACHE (Results 1 – 25 of 30) sorted by relevance

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/dports/devel/sunpromake/schily-2021-09-18/include/schily/
H A Drmtio.h72 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/devel/smake/schily-2021-09-18/include/schily/
H A Drmtio.h72 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/devel/schilybase/schily-2021-09-18/include/schily/
H A Drmtio.h72 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/net/rscsi/schily-2021-09-18/include/schily/
H A Drmtio.h72 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/archivers/star/schily-2021-09-18/include/schily/
H A Drmtio.h72 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/sysutils/cdrkit/cdrkit-1.1.11/include/
H A Drmtio.h81 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/sysutils/cdrdao/cdrdao-1.2.4/scsilib/include/
H A Drmtio.h70 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/sysutils/cdrtools/schily-2021-09-18/include/schily/
H A Drmtio.h72 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/editors/ved/schily-2021-09-18/include/schily/
H A Drmtio.h72 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/sysutils/genisoimage/cdrkit-1.1.11/include/
H A Drmtio.h81 #define RMTICACHE 0 /* enable controller cache */
/dports/devel/sccs/schily-2021-09-18/include/schily/
H A Drmtio.h72 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/sysutils/schilyutils/schily-2021-09-18/include/schily/
H A Drmtio.h72 #define RMTICACHE 0 /* enable controller cache */ macro
/dports/devel/sunpromake/schily-2021-09-18/rmt/
H A Drmt.c651 #define RMTICACHE 0 macro
833 case RMTICACHE: return (MTCACHE);
/dports/devel/smake/schily-2021-09-18/rmt/
H A Drmt.c651 #define RMTICACHE 0 macro
833 case RMTICACHE: return (MTCACHE);
/dports/devel/sccs/schily-2021-09-18/rmt/
H A Drmt.c651 #define RMTICACHE 0 macro
833 case RMTICACHE: return (MTCACHE);
/dports/devel/schilybase/schily-2021-09-18/rmt/
H A Drmt.c651 #define RMTICACHE 0 macro
833 case RMTICACHE: return (MTCACHE);
/dports/net/rscsi/schily-2021-09-18/rmt/
H A Drmt.c651 #define RMTICACHE 0
833 case RMTICACHE: return (MTCACHE);
/dports/archivers/star/schily-2021-09-18/rmt/
H A Drmt.c651 #define RMTICACHE 0 macro
833 case RMTICACHE: return (MTCACHE);
/dports/sysutils/cdrtools/schily-2021-09-18/rmt/
H A Drmt.c651 #define RMTICACHE 0 macro
833 case RMTICACHE: return (MTCACHE);
/dports/editors/ved/schily-2021-09-18/rmt/
H A Drmt.c651 #define RMTICACHE 0 macro
833 case RMTICACHE: return (MTCACHE);
/dports/sysutils/schilyutils/schily-2021-09-18/rmt/
H A Drmt.c651 #define RMTICACHE 0 macro
833 case RMTICACHE: return (MTCACHE);
/dports/devel/sunpromake/schily-2021-09-18/librmt/
H A Dremote.c882 case MTCACHE: return (RMTICACHE);
/dports/devel/smake/schily-2021-09-18/librmt/
H A Dremote.c882 case MTCACHE: return (RMTICACHE);
/dports/devel/schilybase/schily-2021-09-18/librmt/
H A Dremote.c882 case MTCACHE: return (RMTICACHE);
/dports/net/rscsi/schily-2021-09-18/librmt/
H A Dremote.c882 case MTCACHE: return (RMTICACHE);

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