/dports/emulators/anese/ANESE-0.9.1/roms/tests/cpu/cpu_dummy_writes/source/ |
H A D | cpu_dummy_writes_oam.s | 352 ; * 1E (RMW) ASL absx U 1F (RMW) SLO absx (ASL+ORA) U 1B (RMW) SLO absy (ASL+ORA) 353 ; * 3E (RMW) ROL absx U 3F (RMW) RLA absx (ROL+AND) U 3B (RMW) RLA absy (ROL+AND) 354 ; * 5E (RMW) LSR absx U 5F (RMW) SRE absx (LSR+EOR) U 5B (RMW) SRE absy (LSR+EOR) 355 ; * 7E (RMW) ROR absx U 7F (RMW) RRA absx (ROR+ADC) U 7B (RMW) RRA absy (ROR+ADC) 356 ; * DE (RMW) DEC absx U DF (RMW) DCP absx (DEC+CMP) U DB (RMW) DCP absy (DEC+CMP) 359 ; K 12 (RMW) ASL ix U 03 (RMW) SLO ix (ASL+ORA) U 13 (RMW) SLO iy (ASL+ORA) 360 ; K 32 (RMW) ROL ix U 23 (RMW) RLA ix (ROL+AND) U 33 (RMW) RLA iy (ROL+AND) 361 ; K 52 (RMW) LSR ix U 43 (RMW) SRE ix (LSR+EOR) U 53 (RMW) SRE iy (LSR+EOR) 362 ; K 72 (RMW) ROR ix U 63 (RMW) RRA ix (ROR+ADC) U 73 (RMW) RRA iy (ROR+ADC) 363 ; K D2 (RMW) DEC ix U C3 (RMW) DCP ix (DEC+CMP) U D3 (RMW) DCP iy (DEC+CMP) [all …]
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H A D | cpu_dummy_writes_ppumem.s | 188 ; * 1E (RMW) ASL absx U 1F (RMW) SLO absx (ASL+ORA) U 1B (RMW) SLO absy (ASL+ORA) 189 ; * 3E (RMW) ROL absx U 3F (RMW) RLA absx (ROL+AND) U 3B (RMW) RLA absy (ROL+AND) 190 ; * 5E (RMW) LSR absx U 5F (RMW) SRE absx (LSR+EOR) U 5B (RMW) SRE absy (LSR+EOR) 191 ; * 7E (RMW) ROR absx U 7F (RMW) RRA absx (ROR+ADC) U 7B (RMW) RRA absy (ROR+ADC) 192 ; * DE (RMW) DEC absx U DF (RMW) DCP absx (DEC+CMP) U DB (RMW) DCP absy (DEC+CMP) 195 ; K 12 (RMW) ASL ix U 03 (RMW) SLO ix (ASL+ORA) U 13 (RMW) SLO iy (ASL+ORA) 196 ; K 32 (RMW) ROL ix U 23 (RMW) RLA ix (ROL+AND) U 33 (RMW) RLA iy (ROL+AND) 197 ; K 52 (RMW) LSR ix U 43 (RMW) SRE ix (LSR+EOR) U 53 (RMW) SRE iy (LSR+EOR) 198 ; K 72 (RMW) ROR ix U 63 (RMW) RRA ix (ROR+ADC) U 73 (RMW) RRA iy (ROR+ADC) 199 ; K D2 (RMW) DEC ix U C3 (RMW) DCP ix (DEC+CMP) U D3 (RMW) DCP iy (DEC+CMP) [all …]
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/dports/emulators/mednafen/mednafen/src/hw_cpu/6502/ |
H A D | Core6502.inc | 296 // RMW 1401 case 0x0A: INSTR(RMW, A, ASL); break; 1402 case 0x06: INSTR(RMW, ZP, ASL); break; 1403 case 0x16: INSTR(RMW, ZPX, ASL); break; 1404 case 0x0E: INSTR(RMW, AB, ASL); break; 1740 case 0x3A: INSTR(RMW, A, DEC); break; 1741 case 0x1A: INSTR(RMW, A, INC); break; 1757 case 0x1C: INSTR(RMW, AB, TRB); break; 1758 case 0x14: INSTR(RMW, ZP, TRB); break; 1760 case 0x0C: INSTR(RMW, AB, TSB); break; [all …]
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/dports/emulators/dps8m/dps8m-572f79bb4f0f84a8b16c3892c894c2b9ed64b458/src/dps8/ |
H A D | dps8_opcodetable.c | 48 {"ldqc", RMW, NO_DDCSS, 0, ru_Q}, 50 {"ldac", RMW, NO_DDCSS, 0, ru_A}, 55 {"asx1", RMW | NO_RPL, NO_DDCSS, 0, ru_X1}, 56 {"asx2", RMW | NO_RPL, NO_DDCSS, 0, ru_X2}, 57 {"asx3", RMW | NO_RPL, NO_DDCSS, 0, ru_X3}, 58 {"asx4", RMW | NO_RPL, NO_DDCSS, 0, ru_X4}, 59 {"asx5", RMW | NO_RPL, NO_DDCSS, 0, ru_X5}, 60 {"asx6", RMW | NO_RPL, NO_DDCSS, 0, ru_X6}, 67 {"asa", RMW | NO_RPL, NO_DDCSS, 0, ru_A}, 68 {"asq", RMW | NO_RPL, NO_DDCSS, 0, ru_Q}, [all …]
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/dports/emulators/mess/mame-mame0226/src/devices/cpu/ns32000/ |
H A D | ns32000dasm.cpp | 95 { "ADDQi", QUICK, GEN | RMW | I, 0, 0, 0 }, 99 { "ACBi", QUICK, GEN | RMW | I, DISP, 0, 0 }, 125 { "ADDi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 127 { "BICi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 129 { "ADDCi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 131 { "ORi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 133 { "SUBi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 135 { "ANDi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 137 { "SUBCi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 139 { "XORi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, [all …]
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H A D | ns32000.h | 60 RMW, enumerator 87 void rmw_i(size_code code) { access = RMW; size = code; } in rmw_i() 88 void rmw_f(size_code code) { access = RMW; size = code; slave = true; } in rmw_f()
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/dports/emulators/mame/mame-mame0226/src/devices/cpu/ns32000/ |
H A D | ns32000dasm.cpp | 95 { "ADDQi", QUICK, GEN | RMW | I, 0, 0, 0 }, 99 { "ACBi", QUICK, GEN | RMW | I, DISP, 0, 0 }, 125 { "ADDi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 127 { "BICi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 129 { "ADDCi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 131 { "ORi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 133 { "SUBi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 135 { "ANDi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 137 { "SUBCi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, 139 { "XORi", GEN | READ | I, GEN | RMW | I, 0, 0, 0 }, [all …]
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H A D | ns32000.h | 60 RMW, enumerator 87 void rmw_i(size_code code) { access = RMW; size = code; } in rmw_i() 88 void rmw_f(size_code code) { access = RMW; size = code; slave = true; } in rmw_f()
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/dports/multimedia/libv4l/linux-5.13-rc2/Documentation/litmus-tests/ |
H A D | README | 15 Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus 16 Test that an atomic RMW followed by a smp_mb__after_atomic() is 18 the RMW are ordered before the subsequential memory accesses. 20 Atomic-RMW-ops-are-atomic-WRT-atomic_set.litmus
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/dports/multimedia/v4l-utils/linux-5.13-rc2/Documentation/litmus-tests/ |
H A D | README | 15 Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus 16 Test that an atomic RMW followed by a smp_mb__after_atomic() is 18 the RMW are ordered before the subsequential memory accesses. 20 Atomic-RMW-ops-are-atomic-WRT-atomic_set.litmus
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/dports/multimedia/v4l_compat/linux-5.13-rc2/Documentation/litmus-tests/ |
H A D | README | 15 Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus 16 Test that an atomic RMW followed by a smp_mb__after_atomic() is 18 the RMW are ordered before the subsequential memory accesses. 20 Atomic-RMW-ops-are-atomic-WRT-atomic_set.litmus
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/dports/multimedia/libv4l/linux-5.13-rc2/Documentation/litmus-tests/atomic/ |
H A D | Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus | 1 C Atomic-RMW+mb__after_atomic-is-stronger-than-acquire 6 * Test that an atomic RMW followed by a smp_mb__after_atomic() is 8 * the RMW are ordered before the subsequential memory accesses.
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/dports/multimedia/v4l-utils/linux-5.13-rc2/Documentation/litmus-tests/atomic/ |
H A D | Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus | 1 C Atomic-RMW+mb__after_atomic-is-stronger-than-acquire 6 * Test that an atomic RMW followed by a smp_mb__after_atomic() is 8 * the RMW are ordered before the subsequential memory accesses.
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/dports/multimedia/v4l_compat/linux-5.13-rc2/Documentation/litmus-tests/atomic/ |
H A D | Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus | 1 C Atomic-RMW+mb__after_atomic-is-stronger-than-acquire 6 * Test that an atomic RMW followed by a smp_mb__after_atomic() is 8 * the RMW are ordered before the subsequential memory accesses.
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/dports/devel/ga/ga-5.8/armci/testing/ |
H A D | gpctest.c | 110 #ifdef RMW in test_swap() 122 #ifdef RMW in test_swap() 168 #ifdef RMW in main()
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/dports/games/libretro-uae/libretro-uae-8333daa/sources/src/ |
H A D | compemu_optimizer_x86.c | 29 #define RMW (READ|WRITE) macro 44 #define LRW1 (RMW | SIZE1) 45 #define LRW2 (RMW | SIZE2) 46 #define LRW4 (RMW | SIZE4) 49 #define LFRW (RMW | FLOAT) 152 return access_reg(i,r,RMW); in uses_reg() 162 return linst[i].mem & RMW; in uses_mem() 175 return linst[i].flags & RMW; in uses_flags()
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/dports/games/libretro-hatari/hatari-561c07e/src/cpu/jit/ |
H A D | compemu_optimizer_x86.c | 29 #define RMW (READ|WRITE) macro 44 #define LRW1 (RMW | SIZE1) 45 #define LRW2 (RMW | SIZE2) 46 #define LRW4 (RMW | SIZE4) 49 #define LFRW (RMW | FLOAT) 152 return access_reg(i,r,RMW); in uses_reg() 162 return linst[i].mem & RMW; in uses_mem() 175 return linst[i].flags & RMW; in uses_flags()
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H A D | codegen_x86.c | 926 LOWFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s)) 930 LENDFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s)) 1034 LOWFUNC(RMW,NONE,2,raw_adc_l,(RW4 d, R4 s)) 1038 LENDFUNC(RMW,NONE,2,raw_adc_l,(RW4 d, R4 s)) 1040 LOWFUNC(RMW,NONE,2,raw_adc_w,(RW2 d, R2 s)) 1046 LOWFUNC(RMW,NONE,2,raw_adc_b,(RW1 d, R1 s)) 1100 LOWFUNC(RMW,NONE,2,raw_sbb_l,(RW4 d, R4 s)) 1106 LOWFUNC(RMW,NONE,2,raw_sbb_w,(RW2 d, R2 s)) 1112 LOWFUNC(RMW,NONE,2,raw_sbb_b,(RW1 d, R1 s)) 2526 LOWFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s)) [all …]
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/dports/multimedia/libv4l/linux-5.13-rc2/Documentation/core-api/ |
H A D | refcount-vs-atomic.rst | 76 case 1) - non-"Read/Modify/Write" (RMW) ops 101 case 3) - decrement-based RMW ops that return no value 113 case 4) - increment-based RMW ops that return a value 129 case 5) - generic dec/sub decrement-based RMW ops that return a value 142 case 6) other decrement-based RMW ops that return a value 157 case 7) - lock-based RMW
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/dports/multimedia/v4l-utils/linux-5.13-rc2/Documentation/core-api/ |
H A D | refcount-vs-atomic.rst | 76 case 1) - non-"Read/Modify/Write" (RMW) ops 101 case 3) - decrement-based RMW ops that return no value 113 case 4) - increment-based RMW ops that return a value 129 case 5) - generic dec/sub decrement-based RMW ops that return a value 142 case 6) other decrement-based RMW ops that return a value 157 case 7) - lock-based RMW
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/dports/multimedia/v4l_compat/linux-5.13-rc2/Documentation/core-api/ |
H A D | refcount-vs-atomic.rst | 76 case 1) - non-"Read/Modify/Write" (RMW) ops 101 case 3) - decrement-based RMW ops that return no value 113 case 4) - increment-based RMW ops that return a value 129 case 5) - generic dec/sub decrement-based RMW ops that return a value 142 case 6) other decrement-based RMW ops that return a value 157 case 7) - lock-based RMW
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/dports/science/py-obspy/obspy-1.2.2/obspy/io/focmec/tests/data/ |
H A D | focmec_qedUWne.lst | 46 RMW 51.3 42.6 C 220 P Polarity error at PET MAT TSRJ YONJ TIK PGC BMW RMW SHW NEW COP 233 P Polarity error at PET MAT TSRJ YONJ TIK PGC BMW RMW SHW NEW COP 246 P Polarity error at PET MAT TSRJ YONJ TIK PGC BMW RMW SHW NEW COP 259 P Polarity error at PET MAT TSRJ YONJ TIK PGC BMW RMW SHW NEW COP 272 P Polarity error at PET MAT TSRJ YONJ TIK PGC BMW RMW SHW NEW COP
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/dports/emulators/mednafen/mednafen/src/snes_faust/ |
H A D | Core65816.inc | 1602 case 0x06: INSTR(RMW, DP, ASL<M_type>); break; 1604 case 0x0E: INSTR(RMW, AB, ASL<M_type>); break; 1611 case 0xC6: INSTR(RMW, DP, DEC<M_type>); break; 1613 case 0xCE: INSTR(RMW, AB, DEC<M_type>); break; 1620 case 0xE6: INSTR(RMW, DP, INC<M_type>); break; 1622 case 0xEE: INSTR(RMW, AB, INC<M_type>); break; 1629 case 0x46: INSTR(RMW, DP, LSR<M_type>); break; 1631 case 0x4E: INSTR(RMW, AB, LSR<M_type>); break; 1638 case 0x26: INSTR(RMW, DP, ROL<M_type>); break; 1640 case 0x2E: INSTR(RMW, AB, ROL<M_type>); break; [all …]
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/dports/games/libretro-uae/libretro-uae-8333daa/sources/src/jit/ |
H A D | codegen_x86.c | 926 LOWFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s)) 930 LENDFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s)) 1034 LOWFUNC(RMW,NONE,2,raw_adc_l,(RW4 d, R4 s)) 1038 LENDFUNC(RMW,NONE,2,raw_adc_l,(RW4 d, R4 s)) 1040 LOWFUNC(RMW,NONE,2,raw_adc_w,(RW2 d, R2 s)) 1046 LOWFUNC(RMW,NONE,2,raw_adc_b,(RW1 d, R1 s)) 1100 LOWFUNC(RMW,NONE,2,raw_sbb_l,(RW4 d, R4 s)) 1106 LOWFUNC(RMW,NONE,2,raw_sbb_w,(RW2 d, R2 s)) 1112 LOWFUNC(RMW,NONE,2,raw_sbb_b,(RW1 d, R1 s)) 2526 LOWFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s)) [all …]
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/dports/emulators/aranym/aranym-1.1.0/src/uae_cpu/compiler/ |
H A D | codegen_x86.cpp | 1000 LOWFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s)) 1004 LENDFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s)) 1108 LOWFUNC(RMW,NONE,2,raw_adc_l,(RW4 d, R4 s)) 1112 LENDFUNC(RMW,NONE,2,raw_adc_l,(RW4 d, R4 s)) 1114 LOWFUNC(RMW,NONE,2,raw_adc_w,(RW2 d, R2 s)) 1120 LOWFUNC(RMW,NONE,2,raw_adc_b,(RW1 d, R1 s)) 1174 LOWFUNC(RMW,NONE,2,raw_sbb_l,(RW4 d, R4 s)) 1180 LOWFUNC(RMW,NONE,2,raw_sbb_w,(RW2 d, R2 s)) 1186 LOWFUNC(RMW,NONE,2,raw_sbb_b,(RW1 d, R1 s)) 2568 LOWFUNC(RMW,RMW,2,raw_adc_l_mi,(MEMRW d, IMM s)) [all …]
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