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/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Dd10v-opc.c102 #define RSRC (UNUSED + 1) macro
104 #define RSRC_SP (RSRC + 1)
259 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
268 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
303 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
304 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
308 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
309 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
312 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
313 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dd10v-opc.c101 #define RSRC (UNUSED + 1) macro
103 #define RSRC_SP (RSRC + 1)
258 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
267 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
302 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
303 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
307 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
308 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
311 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
312 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/devel/arm-elf-binutils/binutils-2.37/opcodes/
H A Dd10v-opc.c102 #define RSRC (UNUSED + 1) macro
104 #define RSRC_SP (RSRC + 1)
259 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
268 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
303 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
304 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
308 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
309 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
312 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
313 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/
H A Dd10v-opc.c103 #define RSRC (UNUSED + 1) macro
105 #define RSRC_SP (RSRC + 1)
260 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
269 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
304 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
305 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
309 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
310 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
313 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
314 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Dd10v-opc.c102 #define RSRC (UNUSED + 1) macro
104 #define RSRC_SP (RSRC + 1)
259 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
268 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
303 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
304 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
308 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
309 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
312 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
313 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/devel/gdb/gdb-11.1/opcodes/
H A Dd10v-opc.c102 #define RSRC (UNUSED + 1) macro
104 #define RSRC_SP (RSRC + 1)
259 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
268 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
303 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
304 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
308 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
309 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
312 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
313 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/devel/gdb761/gdb-7.6.1/opcodes/
H A Dd10v-opc.c103 #define RSRC (UNUSED + 1) macro
105 #define RSRC_SP (RSRC + 1)
260 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
269 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
304 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
305 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
309 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
310 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
313 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
314 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Dd10v-opc.c101 #define RSRC (UNUSED + 1) macro
103 #define RSRC_SP (RSRC + 1)
258 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
267 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
302 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
303 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
307 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
308 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
311 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
312 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/devel/gnulibiberty/binutils-2.37/opcodes/
H A Dd10v-opc.c102 #define RSRC (UNUSED + 1) macro
104 #define RSRC_SP (RSRC + 1)
259 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
268 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
303 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
304 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
308 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
309 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
312 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
313 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dd10v-opc.c101 #define RSRC (UNUSED + 1) macro
103 #define RSRC_SP (RSRC + 1)
258 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
267 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
302 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
303 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
307 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
308 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
311 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
312 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dd10v-opc.c101 #define RSRC (UNUSED + 1) macro
103 #define RSRC_SP (RSRC + 1)
258 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
267 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
302 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
303 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
307 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
308 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
311 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
312 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/devel/binutils/binutils-2.37/opcodes/
H A Dd10v-opc.c102 #define RSRC (UNUSED + 1) macro
104 #define RSRC_SP (RSRC + 1)
259 { "mul", SHORT_2, 1, IU, PAR, 0x2e00, 0x7e01 , { RDST, RSRC } },
268 { "mvb", SHORT_2, 1, IU, PAR, 0x5400, 0x7e01, { RDST, RSRC } },
303 { "sll", SHORT_2, 1, IU, PAR, 0x2200, 0x7e01, { RDST, RSRC } },
304 { "sll", SHORT_2, 1, IU, PAR, 0x3200, 0x7ee1, { ADST, RSRC } },
308 { "sra", SHORT_2, 1, IU, PAR, 0x2400, 0x7e01, { RDST, RSRC } },
309 { "sra", SHORT_2, 1, IU, PAR, 0x3400, 0x7ee1, { ADST, RSRC } },
312 { "srl", SHORT_2, 1, IU, PAR, 0x2000, 0x7e01, { RDST, RSRC } },
313 { "srl", SHORT_2, 1, IU, PAR, 0x3000, 0x7ee1, { ADST, RSRC } },
[all …]
/dports/games/moria/umoria/mac/
H A Dmacrsrc.c20 #ifdef RSRC
32 #ifdef RSRC
42 #ifdef RSRC
52 #ifdef RSRC
62 #ifdef RSRC
72 #ifdef RSRC
82 #ifdef RSRC
92 #ifdef RSRC
102 #ifdef RSRC
112 #ifdef RSRC
[all …]
/dports/textproc/libmwaw03/libmwaw-0.3.20/src/tools/file/
H A Drsrc.cpp40 std::string RSRC::Version::makePretty(std::string const &orig) in makePretty()
53 o << RSRC::Version::makePretty(vers.m_string); in operator <<()
69 bool RSRC::createMapEntries() in createMapEntries()
123 std::vector<RSRC::MapEntry> RSRC::getMapEntries(std::string type) in getMapEntries()
156 bool RSRC::hasEntry(std::string type, int id) in hasEntry()
158 auto lEntries = RSRC::getMapEntries(type); in hasEntry()
165 std::string RSRC::getString(int id) in getString()
168 auto lEntries = RSRC::getMapEntries("STR "); in getString()
192 std::vector<RSRC::Version> RSRC::getVersionList() in getVersionList()
195 auto lEntries = RSRC::getMapEntries("vers"); in getVersionList()
[all …]
H A Drsrc.h43 class RSRC
70 explicit RSRC(InputStream &input) in RSRC() function
77 ~RSRC() {} in ~RSRC()
108 RSRC(RSRC const &orig) = delete;
109 RSRC &operator=(RSRC const &orig) = delete;
/dports/math/scalapack/scalapack-2.1.0/SRC/
H A Dpdrot.f286 XYROWS = NUMROC( N+IROFFXY, MB, MYROW, RSRC, NPROW )
288 $ MYROW.EQ.RSRC ) XYROWS = XYROWS - IROFFXY
346 $ MYCOL, XLOC1, XLOC2, RSRC, CSRC )
347 IF( MYROW.EQ.RSRC .AND. MYCOL.EQ.CSRC ) THEN
374 IF( MYROW.EQ.RSRC .AND. MYCOL.EQ.CSRC ) THEN
395 IF( MYROW.EQ.RSRC .AND. MYCOL.EQ.CSRC ) THEN
399 $ RSRC, CSRC2 )
401 $ RSRC, CSRC2 )
422 IF( MYROW.EQ.RSRC .AND. MYCOL.EQ.CSRC ) THEN
425 $ RSRC, CSRC1 )
[all …]
H A Dpsrot.f286 XYROWS = NUMROC( N+IROFFXY, MB, MYROW, RSRC, NPROW )
288 $ MYROW.EQ.RSRC ) XYROWS = XYROWS - IROFFXY
346 $ MYCOL, XLOC1, XLOC2, RSRC, CSRC )
347 IF( MYROW.EQ.RSRC .AND. MYCOL.EQ.CSRC ) THEN
374 IF( MYROW.EQ.RSRC .AND. MYCOL.EQ.CSRC ) THEN
395 IF( MYROW.EQ.RSRC .AND. MYCOL.EQ.CSRC ) THEN
399 $ RSRC, CSRC2 )
401 $ RSRC, CSRC2 )
422 IF( MYROW.EQ.RSRC .AND. MYCOL.EQ.CSRC ) THEN
425 $ RSRC, CSRC1 )
[all …]
/dports/x11-clocks/xdaliclock/xdaliclock-2.44/palm/
H A DMakefile.in45 RSRC = .rsrc
85 -rm -rf $(RSRC)
158 @cp daliclock $(RSRC)
159 cd $(RSRC); $(OBJRES) daliclock
160 @touch $(RSRC)/code.stamp
163 $(PILRC) -q -I $(srcdir) $(srcdir)/$(RSC) $(RSRC)
164 @touch $(RSRC)/bin.stamp
166 daliclock.prc: $(RSRC) $(RSRC)/code.stamp $(RSRC)/bin.stamp
167 cd $(RSRC); $(BUILDPRC) ../$@ $(ICONTEXT) $(CREATOR_ID) *.grc *.bin
170 $(RSRC):
[all …]
/dports/math/scalapack/scalapack-2.1.0/TOOLS/
H A Ddesc_convert.f39 INTEGER CSRC, RSRC, MB, NB, LLDA
53 RSRC = 0
63 RSRC = DESC_IN( RSRC_ )
73 RSRC = DESC_IN( 5 )
84 RSRC = 1
114 DESC_OUT( 5 ) = RSRC
H A Dpccol2row.f1 SUBROUTINE PCCOL2ROW( ICTXT, M, N, NB, VS, LDVS, VD, LDVD, RSRC, argument
11 $ RDEST, RSRC
133 MYDIST = MOD( NPROW+MYROW-RSRC, NPROW )
134 MP = NUMROC( M, NB, MYROW, RSRC, NPROW )
187 IRSRC = MOD( RSRC+MYDIST, NPROW )
238 MYDIST = MOD( NPROW+MYROW-RSRC, NPROW )
239 MP = NUMROC( M, NB, MYROW, RSRC, NPROW )
256 IRSRC = MOD( RSRC+MYDIST, NPROW )
H A Dpdcol2row.f1 SUBROUTINE PDCOL2ROW( ICTXT, M, N, NB, VS, LDVS, VD, LDVD, RSRC, argument
11 $ RDEST, RSRC local
135 MYDIST = MOD( NPROW+MYROW-RSRC, NPROW )
136 MP = NUMROC( M, NB, MYROW, RSRC, NPROW )
189 IRSRC = MOD( RSRC+MYDIST, NPROW )
240 MYDIST = MOD( NPROW+MYROW-RSRC, NPROW )
241 MP = NUMROC( M, NB, MYROW, RSRC, NPROW )
258 IRSRC = MOD( RSRC+MYDIST, NPROW )
H A Dpscol2row.f1 SUBROUTINE PSCOL2ROW( ICTXT, M, N, NB, VS, LDVS, VD, LDVD, RSRC, argument
11 $ RDEST, RSRC local
136 MYDIST = MOD( NPROW+MYROW-RSRC, NPROW )
137 MP = NUMROC( M, NB, MYROW, RSRC, NPROW )
190 IRSRC = MOD( RSRC+MYDIST, NPROW )
241 MYDIST = MOD( NPROW+MYROW-RSRC, NPROW )
242 MP = NUMROC( M, NB, MYROW, RSRC, NPROW )
259 IRSRC = MOD( RSRC+MYDIST, NPROW )
H A Dpcrow2col.f2 $ RSRC, CSRC, RDEST, CDEST, WORK)
11 $ RDEST, RSRC
123 IF( MYROW.EQ.RSRC ) THEN
191 IF( (MYROW.NE.RSRC).OR.(MYCOL.NE.ICSRC) ) THEN
199 $ CALL CGERV2D( ICTXT, JJ, N, WORK, JJ, RSRC, ICSRC )
232 IF( MYROW.EQ.RSRC ) THEN
254 IF( (MYCOL.NE.ICSRC).OR.(MYROW.NE. RSRC) )
255 $ CALL CGERV2D( ICTXT, MP, N, VD, LDVD, RSRC, ICSRC )
H A Dpdrow2col.f2 $ RSRC, CSRC, RDEST, CDEST, WORK) argument
11 $ RDEST, RSRC local
126 IF( MYROW.EQ.RSRC ) THEN
194 IF( (MYROW.NE.RSRC).OR.(MYCOL.NE.ICSRC) ) THEN
202 $ CALL DGERV2D( ICTXT, JJ, N, WORK, JJ, RSRC, ICSRC )
235 IF( MYROW.EQ.RSRC ) THEN
257 IF( (MYCOL.NE.ICSRC).OR.(MYROW.NE. RSRC) )
258 $ CALL DGERV2D( ICTXT, MP, N, VD, LDVD, RSRC, ICSRC )
H A Dpirow2col.f2 $ RSRC, CSRC, RDEST, CDEST, WORK) argument
11 $ RDEST, RSRC local
126 IF( MYROW.EQ.RSRC ) THEN
194 IF( (MYROW.NE.RSRC).OR.(MYCOL.NE.ICSRC) ) THEN
202 $ CALL IGERV2D( ICTXT, JJ, N, WORK, JJ, RSRC, ICSRC )
235 IF( MYROW.EQ.RSRC ) THEN
257 IF( (MYCOL.NE.ICSRC).OR.(MYROW.NE. RSRC) )
258 $ CALL IGERV2D( ICTXT, MP, N, VD, LDVD, RSRC, ICSRC )

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