| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/lang/clover/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/r600/ |
| H A D | r600_viewport.c | 48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
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| /dports/lang/clover/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 534 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
545 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 534 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
545 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 534 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
545 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 534 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
545 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 534 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
545 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 518 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
527 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 534 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
545 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 534 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
545 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 534 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
545 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 555 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
566 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/radeonsi/ |
| H A D | si_state_viewport.c | 534 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
545 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
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| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/amd/vulkan/ |
| H A D | si_cmd_buffer.c | 247 radeon_set_context_reg(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + i*8, 0); in si_emit_graphics()
662 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in si_write_viewport()
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| /dports/lang/clover/mesa-21.3.6/src/amd/vulkan/ |
| H A D | si_cmd_buffer.c | 246 radeon_set_context_reg(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + i * 8, 0); in si_emit_graphics()
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| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/amd/vulkan/ |
| H A D | si_cmd_buffer.c | 246 radeon_set_context_reg(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + i * 8, 0); in si_emit_graphics()
|