Home
last modified time | relevance | path

Searched refs:RegList (Results 1 – 25 of 814) sorted by relevance

12345678910>>...33

/dports/lang/v8/v8-9.6.180.12/src/wasm/baseline/
H A Dliftoff-assembler-defs.h18 constexpr RegList kLiftoffAssemblerGpCacheRegs =
22 constexpr RegList kLiftoffAssemblerFpCacheRegs =
27 constexpr RegList kLiftoffAssemblerGpCacheRegs =
30 constexpr RegList kLiftoffAssemblerFpCacheRegs =
35 constexpr RegList kLiftoffAssemblerGpCacheRegs =
43 constexpr RegList kLiftoffAssemblerGpCacheRegs =
52 constexpr RegList kLiftoffAssemblerGpCacheRegs =
64 constexpr RegList kLiftoffAssemblerGpCacheRegs =
75 constexpr RegList kLiftoffAssemblerGpCacheRegs =
86 constexpr RegList kLiftoffAssemblerGpCacheRegs =
[all …]
/dports/emulators/yuzu/yuzu-0b47f7a46/externals/dynarmic/src/backend/x64/
H A Dcallback.h17 using RegList = std::vector<Xbyak::Reg64>; variable
25 …virtual void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList){}) const = …
26 …tCallWithReturnPointer(BlockOfCode& code, std::function<void(Xbyak::Reg64, RegList)> fn) const = 0;
34 … void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList){}) const override;
35 …void EmitCallWithReturnPointer(BlockOfCode& code, std::function<void(Xbyak::Reg64, RegList)> fn) c…
46 … void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList){}) const override;
47 …void EmitCallWithReturnPointer(BlockOfCode& code, std::function<void(Xbyak::Reg64, RegList)> fn) c…
/dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/A64/
H A Dcallback.h17 using RegList = std::vector<Arm64Gen::ARM64Reg>; variable
25 …virtual void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList) {}) const =…
26 …ithReturnPointer(BlockOfCode& code, std::function<void(Arm64Gen::ARM64Reg, RegList)> fn) const = 0;
34 … void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList) {}) const override;
35 …hReturnPointer(BlockOfCode& code, std::function<void(Arm64Gen::ARM64Reg, RegList)> fn) const overr…
46 … void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList) {}) const override;
47 …hReturnPointer(BlockOfCode& code, std::function<void(Arm64Gen::ARM64Reg, RegList)> fn) const overr…
/dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/x64/
H A Dcallback.h17 using RegList = std::vector<Xbyak::Reg64>; variable
25 …virtual void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList){}) const = …
26 …tCallWithReturnPointer(BlockOfCode& code, std::function<void(Xbyak::Reg64, RegList)> fn) const = 0;
34 … void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList){}) const override;
35 …void EmitCallWithReturnPointer(BlockOfCode& code, std::function<void(Xbyak::Reg64, RegList)> fn) c…
46 … void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList){}) const override;
47 …void EmitCallWithReturnPointer(BlockOfCode& code, std::function<void(Xbyak::Reg64, RegList)> fn) c…
/dports/emulators/citra-qt5/citra-ac98458e0/externals/dynarmic/src/backend/A64/
H A Dcallback.h17 using RegList = std::vector<Arm64Gen::ARM64Reg>; variable
25 …virtual void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList) {}) const =…
26 …ithReturnPointer(BlockOfCode& code, std::function<void(Arm64Gen::ARM64Reg, RegList)> fn) const = 0;
34 … void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList) {}) const override;
35 …hReturnPointer(BlockOfCode& code, std::function<void(Arm64Gen::ARM64Reg, RegList)> fn) const overr…
46 … void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList) {}) const override;
47 …hReturnPointer(BlockOfCode& code, std::function<void(Arm64Gen::ARM64Reg, RegList)> fn) const overr…
/dports/emulators/citra/citra-ac98458e0/externals/dynarmic/src/backend/x64/
H A Dcallback.h17 using RegList = std::vector<Xbyak::Reg64>; variable
25 …virtual void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList){}) const = …
26 …tCallWithReturnPointer(BlockOfCode& code, std::function<void(Xbyak::Reg64, RegList)> fn) const = 0;
34 … void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList){}) const override;
35 …void EmitCallWithReturnPointer(BlockOfCode& code, std::function<void(Xbyak::Reg64, RegList)> fn) c…
46 … void EmitCall(BlockOfCode& code, std::function<void(RegList)> fn = [](RegList){}) const override;
47 …void EmitCallWithReturnPointer(BlockOfCode& code, std::function<void(Xbyak::Reg64, RegList)> fn) c…
/dports/www/node10/node-v10.24.1/deps/v8/src/
H A Dreglist.h18 typedef uint64_t RegList; typedef
20 typedef uint32_t RegList;
24 constexpr int NumRegs(RegList list) { in NumRegs()
33 constexpr RegList operator()(RegList list1, RegList list2) const { in operator()
40 constexpr RegList CombineRegLists(RegLists... lists) { in CombineRegLists()
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/codegen/
H A Dreglist.h18 using RegList = uint64_t; variable
20 using RegList = uint32_t;
24 constexpr int NumRegs(RegList list) { in NumRegs()
31 constexpr RegList CombineRegListsHelper(RegList list1, RegList list2) { in CombineRegListsHelper()
38 constexpr RegList CombineRegLists(RegLists... lists) { in CombineRegLists()
/dports/lang/v8/v8-9.6.180.12/src/codegen/
H A Dreglist.h18 using RegList = uint64_t; variable
20 using RegList = uint32_t;
24 constexpr int NumRegs(RegList list) { in NumRegs()
31 constexpr RegList CombineRegListsHelper(RegList list1, RegList list2) { in CombineRegListsHelper()
38 constexpr RegList CombineRegLists(RegLists... lists) { in CombineRegLists()
/dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/codegen/
H A Dreglist.h18 using RegList = uint64_t; variable
20 using RegList = uint32_t;
24 constexpr int NumRegs(RegList list) { in NumRegs()
31 constexpr RegList CombineRegListsHelper(RegList list1, RegList list2) { in CombineRegListsHelper()
38 constexpr RegList CombineRegLists(RegLists... lists) { in CombineRegLists()
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/
H A DARMCallingConv.cpp27 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
42 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
199 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
202 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
209 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
215 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
219 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
223 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
249 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
259 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMCallingConv.cpp27 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
42 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
199 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
202 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
209 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
215 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
219 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
223 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
249 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
259 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/
H A DARMCallingConv.cpp27 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
42 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
199 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
202 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
209 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
215 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
219 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
223 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
249 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
259 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/
H A DARMCallingConv.cpp27 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
42 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
199 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
202 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
209 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
215 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
219 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
223 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
249 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
259 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/
H A DARMCallingConv.h34 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
49 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
206 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
209 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
216 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
222 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
226 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
230 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
256 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
266 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/
H A DARMCallingConv.h34 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
49 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
206 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
209 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
216 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
222 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
226 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
230 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
256 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
266 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/wasm/baseline/
H A Dliftoff-assembler-defs.h18 constexpr RegList kLiftoffAssemblerGpCacheRegs =
22 constexpr RegList kLiftoffAssemblerFpCacheRegs =
27 constexpr RegList kLiftoffAssemblerGpCacheRegs =
30 constexpr RegList kLiftoffAssemblerFpCacheRegs =
35 constexpr RegList kLiftoffAssemblerGpCacheRegs =
43 constexpr RegList kLiftoffAssemblerGpCacheRegs =
52 constexpr RegList kLiftoffAssemblerGpCacheRegs =
63 constexpr RegList kLiftoffAssemblerGpCacheRegs =
68 constexpr RegList kLiftoffAssemblerFpCacheRegs = CPURegister::ListOf(
74 constexpr RegList kLiftoffAssemblerGpCacheRegs = 0xff;
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/wasm/baseline/
H A Dliftoff-assembler-defs.h18 constexpr RegList kLiftoffAssemblerGpCacheRegs =
22 constexpr RegList kLiftoffAssemblerFpCacheRegs =
27 constexpr RegList kLiftoffAssemblerGpCacheRegs =
30 constexpr RegList kLiftoffAssemblerFpCacheRegs =
35 constexpr RegList kLiftoffAssemblerGpCacheRegs =
43 constexpr RegList kLiftoffAssemblerGpCacheRegs =
52 constexpr RegList kLiftoffAssemblerGpCacheRegs =
63 constexpr RegList kLiftoffAssemblerGpCacheRegs =
68 constexpr RegList kLiftoffAssemblerFpCacheRegs = CPURegister::ListOf(
74 constexpr RegList kLiftoffAssemblerGpCacheRegs = 0xff;
[all …]
/dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/utils/TableGen/
H A DCallingConvEmitter.cpp94 ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
95 if (RegList->getSize() == 1) { in EmitAction()
102 for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) { in EmitAction()
104 O << getQualifiedName(RegList->getElementAsRecord(i)); in EmitAction()
108 << Counter << ", " << RegList->getSize() << ")) {\n"; in EmitAction()
115 ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
118 ShadowRegList->getSize() != RegList->getSize()) in EmitAction()
121 if (RegList->getSize() == 1) { in EmitAction()
123 O << getQualifiedName(RegList->getElementAsRecord(0)); in EmitAction()
135 O << getQualifiedName(RegList->getElementAsRecord(i)); in EmitAction()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/
H A DARMCallingConv.cpp27 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
41 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
197 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
200 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
207 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
219 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
224 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
250 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
260 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/
H A DARMCallingConv.cpp27 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
41 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
197 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
200 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
207 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
219 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
224 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
250 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
260 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DARMCallingConv.cpp27 if (unsigned Reg = State.AllocateReg(RegList))
41 if (unsigned Reg = State.AllocateReg(RegList))
197 ArrayRef<MCPhysReg> RegList;
200 RegList = RRegList;
207 State.AllocateReg(RegList[RegIdx++]);
214 RegList = SRegList;
219 RegList = DRegList;
224 RegList = QRegList;
250 if (RegIdx >= RegList.size())
262 RegList = SRegList;
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/
H A DARMCallingConv.cpp27 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
41 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
197 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
200 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
207 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
219 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
224 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
250 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
262 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/
H A DARMCallingConv.cpp27 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
41 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
197 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
200 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
207 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
219 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
224 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
250 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
260 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/
H A DARMCallingConv.cpp27 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
41 if (unsigned Reg = State.AllocateReg(RegList)) in f64AssignAPCS()
197 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
200 RegList = RRegList; in CC_ARM_AAPCS_Custom_Aggregate()
207 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate()
214 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
219 RegList = DRegList; in CC_ARM_AAPCS_Custom_Aggregate()
224 RegList = QRegList; in CC_ARM_AAPCS_Custom_Aggregate()
250 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate()
260 RegList = SRegList; in CC_ARM_AAPCS_Custom_Aggregate()
[all …]

12345678910>>...33