Searched refs:Rsrc03 (Results 1 – 6 of 6) sorted by relevance
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 541 Register Rsrc03 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3); in emitEntryFunctionScratchRsrcRegSetup() local
573 BuildMI(MBB, I, DL, SBitsetB32, Rsrc03) in emitEntryFunctionScratchRsrcRegSetup()
575 .addReg(Rsrc03); in emitEntryFunctionScratchRsrcRegSetup()
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| /dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 541 Register Rsrc03 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3); in emitEntryFunctionScratchRsrcRegSetup() local
573 BuildMI(MBB, I, DL, SBitsetB32, Rsrc03) in emitEntryFunctionScratchRsrcRegSetup()
575 .addReg(Rsrc03); in emitEntryFunctionScratchRsrcRegSetup()
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| /dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 541 Register Rsrc03 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3); in emitEntryFunctionScratchRsrcRegSetup() local
573 BuildMI(MBB, I, DL, SBitsetB32, Rsrc03) in emitEntryFunctionScratchRsrcRegSetup()
575 .addReg(Rsrc03); in emitEntryFunctionScratchRsrcRegSetup()
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| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 541 Register Rsrc03 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3); in emitEntryFunctionScratchRsrcRegSetup() local
573 BuildMI(MBB, I, DL, SBitsetB32, Rsrc03) in emitEntryFunctionScratchRsrcRegSetup()
575 .addReg(Rsrc03); in emitEntryFunctionScratchRsrcRegSetup()
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| /dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 541 Register Rsrc03 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3); in emitEntryFunctionScratchRsrcRegSetup() local
573 BuildMI(MBB, I, DL, SBitsetB32, Rsrc03) in emitEntryFunctionScratchRsrcRegSetup()
575 .addReg(Rsrc03); in emitEntryFunctionScratchRsrcRegSetup()
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| /dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 541 Register Rsrc03 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3); in emitEntryFunctionScratchRsrcRegSetup() local
573 BuildMI(MBB, I, DL, SBitsetB32, Rsrc03) in emitEntryFunctionScratchRsrcRegSetup()
575 .addReg(Rsrc03); in emitEntryFunctionScratchRsrcRegSetup()
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