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Searched refs:S2RCMap (Results 1 – 25 of 36) sorted by relevance

12

/dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/include/llvm/CodeGen/
H A DLiveStackAnalysis.h38 std::map<int, const TargetRegisterClass*> S2RCMap; variable
58 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
61 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
62 S2RCMap[Slot] = getCommonSubClass(OldRC, RC); in getOrCreateInterval()
88 I = S2RCMap.find(Slot); in getIntervalRegClass()
89 assert(I != S2RCMap.end() && in getIntervalRegClass()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
65 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
68 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
69 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/
H A DLiveStacks.cpp47 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/devel/llvm70/llvm-7.0.1.src/lib/CodeGen/
H A DLiveStacks.cpp47 S2RCMap.clear();
66 S2RCMap.insert(std::make_pair(Slot, RC)); in addDFAFuncUnits()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in addDFAFuncUnits()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in addDFAFuncUnits()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/
H A DLiveStacks.cpp46 S2RCMap.clear(); in releaseMemory()
66 S2RCMap.insert(std::make_pair(Slot, RC)); in getOrCreateInterval()
69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; in getOrCreateInterval()
70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/include/llvm/CodeGen/
H A DLiveStacks.h43 std::map<int, const TargetRegisterClass *> S2RCMap; variable
83 S2RCMap.find(Slot); in getIntervalRegClass()
84 assert(I != S2RCMap.end() && in getIntervalRegClass()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/
H A DLiveStacks.h43 std::map<int, const TargetRegisterClass *> S2RCMap; variable
83 S2RCMap.find(Slot); in getIntervalRegClass()
84 assert(I != S2RCMap.end() && in getIntervalRegClass()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/include/llvm/CodeGen/
H A DLiveStacks.h43 std::map<int, const TargetRegisterClass *> S2RCMap; variable
83 S2RCMap.find(Slot); in getIntervalRegClass()
84 assert(I != S2RCMap.end() && in getIntervalRegClass()
/dports/devel/llvm10/llvm-10.0.1.src/include/llvm/CodeGen/
H A DLiveStacks.h43 std::map<int, const TargetRegisterClass *> S2RCMap; variable
83 S2RCMap.find(Slot); in getIntervalRegClass()
84 assert(I != S2RCMap.end() && in getIntervalRegClass()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/include/llvm/CodeGen/
H A DLiveStacks.h43 std::map<int, const TargetRegisterClass *> S2RCMap; variable
83 S2RCMap.find(Slot); in getIntervalRegClass()
84 assert(I != S2RCMap.end() && in getIntervalRegClass()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/include/llvm/CodeGen/
H A DLiveStacks.h43 std::map<int, const TargetRegisterClass *> S2RCMap; variable
83 S2RCMap.find(Slot); in getIntervalRegClass()
84 assert(I != S2RCMap.end() && in getIntervalRegClass()
/dports/devel/llvm11/llvm-11.0.1.src/include/llvm/CodeGen/
H A DLiveStacks.h43 std::map<int, const TargetRegisterClass *> S2RCMap; variable
83 S2RCMap.find(Slot); in getIntervalRegClass()
84 assert(I != S2RCMap.end() && in getIntervalRegClass()

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