| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 286 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
319 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
342 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 286 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
319 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
342 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 286 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
319 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
342 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 286 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
319 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
342 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|
| /dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 288 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_apll_get_rate()
321 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_spll_get_rate()
344 val = (reg & SCG_PLL_CFG_PFDSEL_MASK) >> in scg_ddr_get_rate()
|